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Searched refs:CLOCK_IP_HAS_DDRPLL_PHI0_CLK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.5.0/s32/soc/s32z27/include/
DClock_Ip_Cfg_Defines.h210 #define CLOCK_IP_HAS_DDRPLL_PHI0_CLK 29U macro
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Types.h343 #if defined(CLOCK_IP_HAS_DDRPLL_PHI0_CLK)
344 DDRPLL_PHI0_CLK = CLOCK_IP_HAS_DDRPLL_PHI0_CLK,
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Types.h421 #if defined(CLOCK_IP_HAS_DDRPLL_PHI0_CLK)
422 DDRPLL_PHI0_CLK = CLOCK_IP_HAS_DDRPLL_PHI0_CLK,