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Searched refs:CLK_PAD_CLK (Results 1 – 25 of 32) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/
Dsystem_MIMX8ML6_cm7.c99 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
132 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8ML6_cm7.h69 #define CLK_PAD_CLK 0U /* The value could be changed according to the actual u… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/
Dsystem_MIMX8ML8_cm7.c99 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
132 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8ML8_cm7.h69 #define CLK_PAD_CLK 0U /* The value could be changed according to the actual u… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/
Dsystem_MIMX8MN3_cm7.c94 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
127 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MN3_cm7.h64 #define CLK_PAD_CLK 0u /* The value could be changed according to the actual us… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/
Dsystem_MIMX8MN1_cm7.c94 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
127 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/
Dsystem_MIMX8MN4_cm7.c92 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
125 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/
Dsystem_MIMX8MN5_cm7.c94 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
127 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/
Dsystem_MIMX8MN2_cm7.c92 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
125 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/
Dsystem_MIMX8ML4_cm7.c99 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
132 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/
Dsystem_MIMX8ML3_cm7.c99 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
132 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/
Dsystem_MIMX8MN6_cm7.c92 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
125 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM3/
Dsystem_MIMX8MM3_cm4.c97 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
130 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MM3_cm4.h68 #define CLK_PAD_CLK 0u /* The value could be changed accordi… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM5/
Dsystem_MIMX8MM5_cm4.c97 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
130 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MM5_cm4.h68 #define CLK_PAD_CLK 0u /* The value could be changed accordi… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM1/
Dsystem_MIMX8MM1_cm4.c97 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
130 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MM1_cm4.h68 #define CLK_PAD_CLK 0u /* The value could be changed accordi… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM2/
Dsystem_MIMX8MM2_cm4.c97 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
130 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MM2_cm4.h68 #define CLK_PAD_CLK 0u /* The value could be changed accordi… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM4/
Dsystem_MIMX8MM4_cm4.c97 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
130 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MM4_cm4.h68 #define CLK_PAD_CLK 0u /* The value could be changed accordi… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM6/
Dsystem_MIMX8MM6_cm4.c97 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetFracPllFreq()
130 …refClkFreq = CLK_PAD_CLK; /* CLK_PAD_CLK Clock, please note that the value is 0hz by default, it c… in GetIntegerPllFreq()
Dsystem_MIMX8MM6_cm4.h68 #define CLK_PAD_CLK 0u /* The value could be changed accordi… macro

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