Searched refs:CCR1 (Results 1 – 16 of 16) sorted by relevance
| /hal_nxp-3.5.0/mcux/mcux-sdk/drivers/hscmp/ |
| D | fsl_hscmp.h | 208 base->CCR1 |= HSCMP_CCR1_DMA_EN_MASK; in HSCMP_EnableDMA()
212 base->CCR1 &= ~HSCMP_CCR1_DMA_EN_MASK; in HSCMP_EnableDMA()
229 base->CCR1 |= HSCMP_CCR1_WINDOW_EN_MASK; in HSCMP_EnableWindowMode()
233 base->CCR1 &= ~HSCMP_CCR1_WINDOW_EN_MASK; in HSCMP_EnableWindowMode()
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| D | fsl_hscmp.c | 101 …tmp32 = base->CCR1 & ~(HSCMP_CCR1_COUT_PEN_MASK | HSCMP_CCR1_COUT_SEL_MASK | HSCMP_CCR1_COUT_INV_M… in HSCMP_Init()
114 base->CCR1 = tmp32; in HSCMP_Init()
205 …tmp32 = base->CCR1 & ~(HSCMP_CCR1_FILT_PER_MASK | HSCMP_CCR1_FILT_CNT_MASK | HSCMP_CCR1_SAMPLE_EN_… in HSCMP_SetFilterConfig()
211 base->CCR1 = tmp32; in HSCMP_SetFilterConfig()
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| /hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpcmp/ |
| D | fsl_lpcmp.h | 210 base->CCR1 |= LPCMP_CCR1_DMA_EN_MASK; in LPCMP_EnableDMA()
214 base->CCR1 &= ~LPCMP_CCR1_DMA_EN_MASK; in LPCMP_EnableDMA()
231 base->CCR1 |= LPCMP_CCR1_WINDOW_EN_MASK; in LPCMP_EnableWindowMode()
235 base->CCR1 &= ~LPCMP_CCR1_WINDOW_EN_MASK; in LPCMP_EnableWindowMode()
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| D | fsl_lpcmp.c | 113 …tmp32 = base->CCR1 & ~(LPCMP_CCR1_COUT_PEN_MASK | LPCMP_CCR1_COUT_SEL_MASK | LPCMP_CCR1_COUT_INV_M… in LPCMP_Init()
126 base->CCR1 = tmp32; in LPCMP_Init()
217 …tmp32 = base->CCR1 & ~(LPCMP_CCR1_FILT_PER_MASK | LPCMP_CCR1_FILT_CNT_MASK | LPCMP_CCR1_SAMPLE_EN_… in LPCMP_SetFilterConfig()
223 base->CCR1 = tmp32; in LPCMP_SetFilterConfig()
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| /hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lpspi/ |
| D | fsl_lpspi.h | 817 uint32_t ccr1 = base->CCR1; in LPSPI_FlushFifo()
831 base->CCR1 = ccr1; in LPSPI_FlushFifo()
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| D | fsl_lpspi.c | 600 …base->CCR = base->CCR | LPSPI_CCR_DBT((base->CCR1 & LPSPI_CCR1_SCKSCK_MASK) >> LPSPI_CCR1_SCKSCK_S… in LPSPI_MasterSetBaudRate()
642 uint32_t dbt = (base->CCR1 & LPSPI_CCR1_SCKSCK_MASK) >> LPSPI_CCR1_SCKSCK_SHIFT;
643 uint32_t sckdiv = (base->CCR1 & LPSPI_CCR1_SCKHLD_MASK) >> LPSPI_CCR1_SCKHLD_SHIFT;
644 sckdiv += (base->CCR1 & LPSPI_CCR1_SCKSET_MASK) >> LPSPI_CCR1_SCKSET_SHIFT;
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| /hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_LPCMP.h | 76 …__IO uint32_t CCR1; /**< Comparator Control Register 1, offset: 0xC */ member
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| D | S32K344_LPSPI.h | 91 __IO uint32_t CCR1; /**< Clock Configuration 1, offset: 0x44 */ member
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| /hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_SIPI.h | 84 …__IO uint32_t CCR1; /**< SIPI Channel Control Register 1, offset: 0x2… member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm0plus.h | 8576 …__IO uint32_t CCR1; /**< Comparator Control Register 1, offset: 0xC */ member
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| D | K32L3A60_cm4.h | 9211 …__IO uint32_t CCR1; /**< Comparator Control Register 1, offset: 0xC */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/ |
| D | LPC5536.h | 18180 …__IO uint32_t CCR1; /**< Comparator Control Register 1, offset: 0xC */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/ |
| D | LPC5534.h | 18180 …__IO uint32_t CCR1; /**< Comparator Control Register 1, offset: 0xC */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/ |
| D | LPC55S36.h | 22981 …__IO uint32_t CCR1; /**< Comparator Control Register 1, offset: 0xC */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/ |
| D | MIMX9352_cm33.h | 48382 __IO uint32_t CCR1; /**< Clock Configuration 1, offset: 0x44 */ member
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| D | MIMX9352_ca55.h | 43153 __IO uint32_t CCR1; /**< Clock Configuration 1, offset: 0x44 */ member
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