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Searched refs:CCM_TUPLE_SHIFT (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-3.5.0/imx/drivers/
Dccm_imx6sx.h50 #define CCM_TUPLE_SHIFT(tuple) (((tuple) >> 8) & 0x1F) macro
679 … (((uint32_t)((mux) << CCM_TUPLE_SHIFT(ccmRootClk))) & CCM_TUPLE_MASK(ccmRootClk)); in CCM_SetRootMux()
693 …return (CCM_TUPLE_REG(base, ccmRootClk) & CCM_TUPLE_MASK(ccmRootClk)) >> CCM_TUPLE_SHIFT(ccmRootCl… in CCM_GetRootMux()
709 … (((uint32_t)((div) << CCM_TUPLE_SHIFT(ccmRootDiv))) & CCM_TUPLE_MASK(ccmRootDiv)); in CCM_SetRootDivider()
725 …return (CCM_TUPLE_REG(base, ccmRootDiv) & CCM_TUPLE_MASK(ccmRootDiv)) >> CCM_TUPLE_SHIFT(ccmRootDi… in CCM_GetRootDivider()
759 … (((uint32_t)((control) << CCM_TUPLE_SHIFT(ccmGate))) & CCM_TUPLE_MASK(ccmGate)); in CCM_ControlGate()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_clock.h81 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
997 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1019 return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux); in CLOCK_GetMux()
1049 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1070 return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider)); in CLOCK_GetDiv()
Dfsl_clock.c467 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
490 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
495 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_clock.h83 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1064 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1086 return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux); in CLOCK_GetMux()
1116 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1137 return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider)); in CLOCK_GetDiv()
Dfsl_clock.c439 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
451 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
456 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_clock.h83 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1222 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1244 return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux); in CLOCK_GetMux()
1274 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1295 return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider)); in CLOCK_GetDiv()
Dfsl_clock.c445 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
457 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
462 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_clock.h83 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1216 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1238 return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux); in CLOCK_GetMux()
1268 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1289 return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider)); in CLOCK_GetDiv()
Dfsl_clock.c445 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
457 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
462 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1366 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1388 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1418 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1439 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c452 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
464 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
469 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1383 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1405 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1435 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1456 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c454 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
466 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
471 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1382 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1404 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1434 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1455 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c450 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
462 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
467 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1366 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1388 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1418 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1439 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c452 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
464 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
469 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1414 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1436 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1466 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1487 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c458 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
470 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
475 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1414 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1436 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1467 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1488 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c458 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
470 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
475 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.h87 #define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) macro
1413 (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); in CLOCK_SetMux()
1435 return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); in CLOCK_GetMux()
1465 … (((uint32_t)((value) << CCM_TUPLE_SHIFT(divider))) & CCM_TUPLE_MASK(divider)); in CLOCK_SetDiv()
1486 …return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divid… in CLOCK_GetDiv()
Dfsl_clock.c458 CCM_TUPLE_SHIFT(clockRootMuxTuple); in CLOCK_GetClockRootFreq()
470 CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + in CLOCK_GetClockRootFreq()
475 CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + in CLOCK_GetClockRootFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.h86 #define CCM_TUPLE_SHIFT(tuple) (((tuple) >> 8U) & 0x1FU) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.h86 #define CCM_TUPLE_SHIFT(tuple) (((tuple) >> 8U) & 0x1FU) macro

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