/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/drivers/ |
D | fsl_clock.c | 787 …uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) | CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_M… in CLOCK_InitFracPll() 788 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_InitFracPll() 791 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = fracCfg0; in CLOCK_InitFracPll() 793 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = in CLOCK_InitFracPll() 801 CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U) = in CLOCK_InitFracPll() 808 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) |= CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_VAL_MASK; in CLOCK_InitFracPll() 811 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) &= ~CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_MASK; in CLOCK_InitFracPll() 814 …while ((CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_ACK_MASK)… in CLOCK_InitFracPll() 832 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U); in CLOCK_GetFracPllFreq() 833 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_GetFracPllFreq() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/drivers/ |
D | fsl_clock.c | 787 …uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) | CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_M… in CLOCK_InitFracPll() 788 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_InitFracPll() 791 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = fracCfg0; in CLOCK_InitFracPll() 793 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = in CLOCK_InitFracPll() 801 CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U) = in CLOCK_InitFracPll() 808 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) |= CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_VAL_MASK; in CLOCK_InitFracPll() 811 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) &= ~CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_MASK; in CLOCK_InitFracPll() 814 …while ((CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_ACK_MASK)… in CLOCK_InitFracPll() 832 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U); in CLOCK_GetFracPllFreq() 833 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_GetFracPllFreq() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/drivers/ |
D | fsl_clock.c | 787 …uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) | CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_M… in CLOCK_InitFracPll() 788 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_InitFracPll() 791 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = fracCfg0; in CLOCK_InitFracPll() 793 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = in CLOCK_InitFracPll() 801 CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U) = in CLOCK_InitFracPll() 808 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) |= CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_VAL_MASK; in CLOCK_InitFracPll() 811 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) &= ~CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_MASK; in CLOCK_InitFracPll() 814 …while ((CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_ACK_MASK)… in CLOCK_InitFracPll() 832 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U); in CLOCK_GetFracPllFreq() 833 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_GetFracPllFreq() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/drivers/ |
D | fsl_clock.c | 787 …uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) | CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_M… in CLOCK_InitFracPll() 788 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_InitFracPll() 791 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = fracCfg0; in CLOCK_InitFracPll() 793 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = in CLOCK_InitFracPll() 801 CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U) = in CLOCK_InitFracPll() 808 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) |= CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_VAL_MASK; in CLOCK_InitFracPll() 811 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) &= ~CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_MASK; in CLOCK_InitFracPll() 814 …while ((CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_ACK_MASK)… in CLOCK_InitFracPll() 832 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U); in CLOCK_GetFracPllFreq() 833 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_GetFracPllFreq() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/drivers/ |
D | fsl_clock.c | 787 …uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) | CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_M… in CLOCK_InitFracPll() 788 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_InitFracPll() 791 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = fracCfg0; in CLOCK_InitFracPll() 793 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) = in CLOCK_InitFracPll() 801 CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U) = in CLOCK_InitFracPll() 808 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) |= CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_VAL_MASK; in CLOCK_InitFracPll() 811 CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) &= ~CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_PD_MASK; in CLOCK_InitFracPll() 814 …while ((CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_NEWDIV_ACK_MASK)… in CLOCK_InitFracPll() 832 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 0U); in CLOCK_GetFracPllFreq() 833 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, 4U); in CLOCK_GetFracPllFreq() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM3/drivers/ |
D | fsl_clock.c | 743 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 745 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 746 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 749 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 751 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 759 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 764 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 780 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 781 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 816 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM2/drivers/ |
D | fsl_clock.c | 743 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 745 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 746 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 749 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 751 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 759 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 764 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 780 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 781 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 816 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM5/drivers/ |
D | fsl_clock.c | 743 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 745 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 746 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 749 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 751 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 759 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 764 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 780 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 781 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 816 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/drivers/ |
D | fsl_clock.c | 740 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 742 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 743 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 746 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 748 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 756 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 761 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 777 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 778 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 813 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM1/drivers/ |
D | fsl_clock.c | 743 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 745 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 746 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 749 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 751 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 759 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 764 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 780 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 781 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 816 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/drivers/ |
D | fsl_clock.c | 740 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 742 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 743 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 746 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 748 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 756 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 761 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 777 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 778 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 813 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM4/drivers/ |
D | fsl_clock.c | 743 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 745 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 746 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 749 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 751 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 759 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 764 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 780 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 781 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 816 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/drivers/ |
D | fsl_clock.c | 737 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 739 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 740 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 743 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 745 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 753 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 758 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 774 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 775 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 810 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/drivers/ |
D | fsl_clock.c | 737 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 739 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 740 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 743 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 745 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 753 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 758 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 774 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 775 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 810 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM6/drivers/ |
D | fsl_clock.c | 743 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 745 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 746 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 749 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 751 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 759 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 764 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 780 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 781 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 816 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/drivers/ |
D | fsl_clock.c | 737 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 739 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 740 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 743 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 745 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 753 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 758 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 774 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 775 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 810 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/drivers/ |
D | fsl_clock.c | 737 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 739 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 740 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 743 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 745 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 753 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 758 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 774 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 775 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 810 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/drivers/ |
D | fsl_clock.c | 737 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 739 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 740 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 743 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 745 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 753 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 758 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 774 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 775 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 810 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/drivers/ |
D | fsl_clock.c | 740 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 742 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 743 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 746 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 748 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 756 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 761 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 777 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 778 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 813 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/drivers/ |
D | fsl_clock.c | 740 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 742 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 743 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 746 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 748 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 756 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 761 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 777 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 778 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 813 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/drivers/ |
D | fsl_clock.c | 737 uint32_t fracCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) & in CLOCK_InitFracPll() 739 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_InitFracPll() 740 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_InitFracPll() 743 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) = fracCfg0; in CLOCK_InitFracPll() 745 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset) = in CLOCK_InitFracPll() 753 CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset) = in CLOCK_InitFracPll() 758 …CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_GNRL_CTL_Offset) |= CCM_ANALOG_AUDIO_PLL1_GEN_CTRL_PL… in CLOCK_InitFracPll() 774 uint32_t fracCfg1 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL0_Offset); in CLOCK_GetFracPllFreq() 775 uint32_t fracCfg2 = CCM_ANALOG_TUPLE_REG_OFF(base, type, FracPLL_FDIV_CTL1_Offset); in CLOCK_GetFracPllFreq() 810 uint32_t integerCfg0 = CCM_ANALOG_TUPLE_REG_OFF(base, type, IntegerPLL_GNRL_CTL_Offset) & in CLOCK_InitIntegerPll() [all …]
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/hal_nxp-3.5.0/imx/drivers/ |
D | ccm_analog_imx6sx.h | 49 #define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) (*((volatile uint32_t *)((uint32_t)base + ((tupl… macro 50 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0) 51 #define CCM_ANALOG_TUPLE_REG_SET(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 4) 52 #define CCM_ANALOG_TUPLE_REG_CLR(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 8)
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D | ccm_analog_imx7d.h | 49 #define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) (*((volatile uint32_t *)((uint32_t)base + ((tupl… macro 50 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0) 51 #define CCM_ANALOG_TUPLE_REG_SET(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 4) 52 #define CCM_ANALOG_TUPLE_REG_CLR(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 8)
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/drivers/ |
D | fsl_clock.h | 93 #define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) \ macro 95 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) 1297 CCM_ANALOG_TUPLE_REG_OFF(base, pll, 4U) = 1UL << CCM_ANALOG_PLL_BYPASS_SHIFT; in CLOCK_SetPllBypass() 1301 CCM_ANALOG_TUPLE_REG_OFF(base, pll, 8U) = 1UL << CCM_ANALOG_PLL_BYPASS_SHIFT; in CLOCK_SetPllBypass()
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/drivers/ |
D | fsl_clock.h | 95 #define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) \ macro 97 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) 1371 CCM_ANALOG_TUPLE_REG_OFF(base, pll, 4U) = 1UL << CCM_ANALOG_PLL_BYPASS_SHIFT; in CLOCK_SetPllBypass() 1375 CCM_ANALOG_TUPLE_REG_OFF(base, pll, 8U) = 1UL << CCM_ANALOG_PLL_BYPASS_SHIFT; in CLOCK_SetPllBypass()
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