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Searched refs:CCM_ANALOG_TUPLE_REG (Results 1 – 25 of 62) sorted by relevance

123

/hal_nxp-3.5.0/imx/drivers/
Dccm_analog_imx6sx.h50 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0) macro
202 return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_PLL_ARM_BYPASS_MASK); in CCM_ANALOG_IsPllBypassed()
216 return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_PLL_ARM_LOCK_MASK); in CCM_ANALOG_IsPllLocked()
290 return (bool)(CCM_ANALOG_TUPLE_REG(base, pfdStable) & (1 << CCM_ANALOG_TUPLE_SHIFT(pfdStable))); in CCM_ANALOG_IsPfdStable()
317 …return (CCM_ANALOG_TUPLE_REG(base, pfdFrac) >> CCM_ANALOG_TUPLE_SHIFT(pfdFrac)) & CCM_ANALOG_PFD_4… in CCM_ANALOG_GetPfdFrac()
Dccm_analog_imx7d.h50 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0) macro
222 return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_PLL_ARM_BYPASS_MASK); in CCM_ANALOG_IsPllBypassed()
236 return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_PLL_ARM_LOCK_MASK); in CCM_ANALOG_IsPllLocked()
349 return (bool)(CCM_ANALOG_TUPLE_REG(base, pfdStable) & (1 << CCM_ANALOG_TUPLE_SHIFT(pfdStable))); in CCM_ANALOG_IsPfdStable()
375 …return (CCM_ANALOG_TUPLE_REG(base, pfdFrac) >> CCM_ANALOG_TUPLE_SHIFT(pfdFrac)) & CCM_ANALOG_PFD_4… in CCM_ANALOG_GetPfdFrac()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM3/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1240 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1267 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1271 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1286 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1300 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1311 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1338 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM5/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1240 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1267 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1271 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1286 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1300 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1311 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1338 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM1/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1240 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1267 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1271 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1286 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1300 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1311 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1338 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM2/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1240 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1267 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1271 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1286 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1300 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1311 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1338 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM4/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1240 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1267 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1271 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1286 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1300 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1311 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1338 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ5/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1224 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1235 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_PowerDownPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1255 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1270 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1284 … return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1295 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1306 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverrideAnalogClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/drivers/
Dfsl_clock.h202 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1233 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1244 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1260 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1264 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1279 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1293 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1304 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1315 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1331 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ6/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1224 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1235 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_PowerDownPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1255 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1270 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1284 … return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1295 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1306 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverrideAnalogClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MQ7/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1224 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1235 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_PowerDownPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1255 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1270 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1284 … return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1295 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1306 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverrideAnalogClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MM6/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1240 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1267 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1271 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1286 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1300 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1311 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1338 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/drivers/
Dfsl_clock.h202 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1233 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1244 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1260 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1264 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1279 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1293 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1304 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1315 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1331 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN5/drivers/
Dfsl_clock.h202 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1233 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1244 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1260 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1264 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1279 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1293 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1304 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1315 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1331 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/drivers/
Dfsl_clock.h202 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1233 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1244 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1260 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1264 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1279 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1293 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1304 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1315 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1331 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN4/drivers/
Dfsl_clock.h202 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1233 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1244 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1260 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1264 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1279 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1293 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1304 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1315 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1331 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN6/drivers/
Dfsl_clock.h202 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1233 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1244 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1260 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1264 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1279 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1293 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1304 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1315 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1331 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD6/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1224 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1235 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_PowerDownPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1255 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1270 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1284 … return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1295 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1306 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverrideAnalogClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MD7/drivers/
Dfsl_clock.h195 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1224 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1235 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_PowerDownPll()
1251 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1255 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1270 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1284 … return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_AUDIO_PLL1_CFG0_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1295 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1306 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1322 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverrideAnalogClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
Dfsl_clock.h220 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1490 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1501 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1517 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1521 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1536 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1550 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1561 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1572 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1588 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML8/drivers/
Dfsl_clock.h220 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1490 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1501 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1517 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1521 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1536 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1550 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1561 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1572 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1588 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
Dfsl_clock.h220 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1490 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1501 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1517 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1521 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1536 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1550 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1561 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1572 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1588 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
Dfsl_clock.h220 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1490 CCM_ANALOG_TUPLE_REG(base, pllControl) |= (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerUpPll()
1501 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_PowerDownPll()
1517 CCM_ANALOG_TUPLE_REG(base, pllControl) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl); in CLOCK_SetPllBypass()
1521 CCM_ANALOG_TUPLE_REG(base, pllControl) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl)); in CLOCK_SetPllBypass()
1536 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pllControl))… in CLOCK_IsPllBypassed()
1550 …return (bool)(CCM_ANALOG_TUPLE_REG(base, pllControl) & CCM_ANALOG_SYS_PLL1_GEN_CTRL_PLL_LOCK_MASK); in CLOCK_IsPllLocked()
1561 CCM_ANALOG_TUPLE_REG(base, pllClock) |= 1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock); in CLOCK_EnableAnalogClock()
1572 CCM_ANALOG_TUPLE_REG(base, pllClock) &= ~(1UL << CCM_ANALOG_TUPLE_SHIFT(pllClock)); in CLOCK_DisableAnalogClock()
1588 CCM_ANALOG_TUPLE_REG(base, ovClock) |= 1UL << (CCM_ANALOG_TUPLE_SHIFT(ovClock) - 1UL); in CLOCK_OverridePllClke()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_clock.h95 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1316 return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1UL << CCM_ANALOG_PLL_BYPASS_SHIFT)); in CLOCK_IsPllBypassed()
1330 return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pll))); in CLOCK_IsPllEnabled()
1343CCM_ANALOG_TUPLE_REG(base, pll) |= (CCM_ANALOG_TUPLE_REG(base, pll) & (~CCM_ANALOG_PLL_BYPASS_CLK_… in CLOCK_SetPllBypassRefClkSrc()
1356 return ((((uint32_t)(CCM_ANALOG_TUPLE_REG(base, pll) & CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK)) >> in CLOCK_GetPllBypassRefClk()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_clock.h97 #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) macro
1390 return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1UL << CCM_ANALOG_PLL_BYPASS_SHIFT)); in CLOCK_IsPllBypassed()
1404 return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pll))); in CLOCK_IsPllEnabled()
1417CCM_ANALOG_TUPLE_REG(base, pll) |= (CCM_ANALOG_TUPLE_REG(base, pll) & (~CCM_ANALOG_PLL_BYPASS_CLK_… in CLOCK_SetPllBypassRefClkSrc()
1430 return ((((uint32_t)(CCM_ANALOG_TUPLE_REG(base, pll) & CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK)) >> in CLOCK_GetPllBypassRefClk()

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