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Searched refs:CAN_RXF1S_F1GI_MASK (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/mcan/
Dfsl_mcan.c1176 eAddress += ((base->RXF1S & CAN_RXF1S_F1GI_MASK) >> CAN_RXF1S_F1GI_SHIFT) * eSize * 4U; in MCAN_GetRxFifo1ElementAddress()
1350 base->RXF1A = (base->RXF1S & CAN_RXF1S_F1GI_MASK) >> CAN_RXF1S_F1GI_SHIFT; in MCAN_ReadRxFifo()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h2553 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2557 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h2325 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2328 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h2478 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2482 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h2551 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2555 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h2551 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2555 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h2551 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2555 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h5414 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5418 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h2474 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2478 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h2959 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2963 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h2690 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2693 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h2549 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2553 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h2959 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
2963 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h5459 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5463 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h5459 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5463 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h5414 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5418 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h5414 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5418 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h5459 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5463 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h5889 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5893 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h5461 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5465 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h5461 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5465 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h5893 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5897 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h5892 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5896 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h5890 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5894 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h5891 #define CAN_RXF1S_F1GI_MASK (0x3F00U) macro
5895 … (((uint32_t)(((uint32_t)(x)) << CAN_RXF1S_F1GI_SHIFT)) & CAN_RXF1S_F1GI_MASK)

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