Searched refs:CACHE64_POLSEL0 (Results 1 – 2 of 2) sorted by relevance
76 CACHE64_POLSEL0->REG0_TOP = 0x7FFC00; in enable_cache64()77 CACHE64_POLSEL0->REG1_TOP = 0x0; in enable_cache64()78 CACHE64_POLSEL0->POLSEL = in enable_cache64()
357 CACHE64_POLSEL0->REG1_TOP = 0x27FFFC00U; in rt5xx_clock_init()358 CACHE64_POLSEL0->POLSEL = 0x11U; in rt5xx_clock_init()
