CACHE64_CTRL0_NS (reference) in projects: hal_nxp-3.5.0

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Searched refs:CACHE64_CTRL0_NS (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
D	LPC5536.h	`2279 #define CACHE64_CTRL0_NS ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE_NS) macro 2287 #define CACHE64_CTRL_BASE_PTRS_NS { CACHE64_CTRL0_NS }`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
D	LPC5534.h	`2279 #define CACHE64_CTRL0_NS ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE_NS) macro 2287 #define CACHE64_CTRL_BASE_PTRS_NS { CACHE64_CTRL0_NS }`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/
D	MIMXRT533S.h	`7619 #define CACHE64_CTRL0_NS ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE_NS) macro 7635 #define CACHE64_CTRL_BASE_PTRS_NS { CACHE64_CTRL0_NS, CACHE64_CTRL1_NS }`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/
D	LPC55S36.h	`2278 #define CACHE64_CTRL0_NS ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE_NS) macro 2286 #define CACHE64_CTRL_BASE_PTRS_NS { CACHE64_CTRL0_NS }`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
D	MIMXRT595S_cm33.h	`7623 #define CACHE64_CTRL0_NS ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE_NS) macro 7639 #define CACHE64_CTRL_BASE_PTRS_NS { CACHE64_CTRL0_NS, CACHE64_CTRL1_NS }`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/
D	MIMXRT555S.h	`7622 #define CACHE64_CTRL0_NS ((CACHE64_CTRL_Type *)CACHE64_CTRL0_BASE_NS) macro 7638 #define CACHE64_CTRL_BASE_PTRS_NS { CACHE64_CTRL0_NS, CACHE64_CTRL1_NS }`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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