Home
last modified time | relevance | path

Searched refs:B2 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.5.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/cfgs_kw4x_3x_2x/
Dfsl_xcvr_common_config.c463 ….end_of_seq_init_26mhz = B3(END_OF_RX_WD_26MHZ) | B2(END_OF_RX_WU_26MHZ) | B1(END_OF_TX_WD) | B0(E…
464 ….end_of_seq_init_32mhz = B3(END_OF_RX_WD) | B2(END_OF_RX_WU) | B1(END_OF_TX_WD) | B0(END_OF_TX_WU),
467 .lpps_ctrl_init = B3(102) | B2(40) | B1(0) | B0(0),
470 .tsm_fast_ctrl2_init_26mhz = B3(102 + ADD_FOR_26MHZ) | B2(40 + ADD_FOR_26MHZ) | B1(66) | B0(8),
471 .tsm_fast_ctrl2_init_32mhz = B3(102) | B2(40) | B1(66) | B0(8),
478 ….recycle_count_init_26mhz = B3(0) | B2(0x1C + ADD_FOR_26MHZ) | B1(0x06) | B0(0x66 + ADD_FOR_26MHZ),
479 .recycle_count_init_26mhz = B3(0) | B2(0x1C) | B1(0x06) | B0(0x66),
481 ….tsm_timing_00_init = B3(END_OF_RX_WD) | B2(0x00) | B1(END_OF_TX_WD) | B0(0x00), /* bb_ldo_hf_en */
482 ….tsm_timing_01_init = B3(END_OF_RX_WD) | B2(0x00) | B1(END_OF_TX_WD) | B0(0x00), /* bb_ldo_adcdac_…
483 .tsm_timing_02_init = B3(END_OF_RX_WD) | B2(0x00) | B1(0xFF) | B0(0xFF), /* bb_ldo_bba_en */
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/components/video/camera/receiver/isi/
Dfsl_isi_camera_adapter.c278 .B2 = -0.392f, in ISI_ADAPTER_InitExt()
294 .B2 = -0.291f, in ISI_ADAPTER_InitExt()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/isi/
Dfsl_isi.c401 coeff = (ISI_ConvertFloat(config->B2, 2, 8) << ISI_CHNL_CSC_COEFF2_B2_SHIFT); in ISI_SetColorSpaceConversionConfig()
451 config->B2 = 0.0f; in ISI_ColorSpaceConversionGetDefaultConfig()
Dfsl_isi.h221 float B2; /*!< Must be in the range of [-3.99609375, 3.99609375]. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/algorithms/sensorfusion/sources/
Dsensor_fusion.h74 #define B2 (1 << 2) macro
/hal_nxp-3.5.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Dfsl_xcvr.h70 #define B2(x) (((uint32_t)(((uint32_t)(x)) << 16)) & 0xFF0000U) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/pxp/
Dfsl_pxp.h534 float B2; /*!< B2. */ member
Dfsl_pxp.c777 …(PXP_ConvertFloat(config->B2, PXP_CSC2_COEF_INT_WIDTH, PXP_CSC2_COEF_FRAC_WIDTH) << PXP_CSC2_COEF2… in PXP_SetCsc2Config()
/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/DSP/Source/CommonTables/
Darm_common_tables.c70541 #define B2(n) n, n + 1, n + 1, n + 2 macro
70542 #define B4(n) B2(n) , B2(n + 1), B2(n + 1), B2(n + 2)