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Searched refs:ADC1CLKDIV (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/drivers/
Dfsl_clock.c492 ((SYSCON->ADC1CLKDIV & SYSCON_ADC1CLKDIV_DIV_MASK) + 1U)); in CLOCK_GetAdcClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/drivers/
Dfsl_clock.c492 ((SYSCON->ADC1CLKDIV & SYSCON_ADC1CLKDIV_DIV_MASK) + 1U)); in CLOCK_GetAdcClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/drivers/
Dfsl_clock.c492 ((SYSCON->ADC1CLKDIV & SYSCON_ADC1CLKDIV_DIV_MASK) + 1U)); in CLOCK_GetAdcClkFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h40052 __IO uint32_t ADC1CLKDIV; /**< ADC1 clock divider, offset: 0x468 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h40052 __IO uint32_t ADC1CLKDIV; /**< ADC1 clock divider, offset: 0x468 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h52266 __IO uint32_t ADC1CLKDIV; /**< ADC1 clock divider, offset: 0x468 */ member