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Searched refs:DMA1_TRIG15_PIO1_9 (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC55S06JBD64-pinctrl.h2323 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S69JBD100-pinctrl.h2552 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S69JEV98-pinctrl.h2552 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S28JBD100-pinctrl.h2552 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S28JEV98-pinctrl.h2552 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S16JBD100-pinctrl.h2532 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S16JEV98-pinctrl.h2532 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
DLPC55S36JBD100-pinctrl.h4822 #define DMA1_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_A, 0) /* PIO1_9 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2978 #define DMA1_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro
DMIMXRT595SFAWC-pinctrl.h3614 #define DMA1_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro
DMIMXRT685SFFOB-pinctrl.h3719 #define DMA1_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro
DMIMXRT685SFVKB-pinctrl.h3719 #define DMA1_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro