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Searched refs:DMA1_TRIG12_PIO0_27 (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h1342 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S16JBD64-pinctrl.h1752 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S69JBD64-pinctrl.h1764 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S28JBD64-pinctrl.h1764 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S06JBD64-pinctrl.h1695 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S36JHI48-pinctrl.h2906 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S69JBD100-pinctrl.h1764 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S69JEV98-pinctrl.h1764 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S28JBD100-pinctrl.h1764 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S28JEV98-pinctrl.h1764 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S16JBD100-pinctrl.h1752 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S16JEV98-pinctrl.h1752 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S36JBD100-pinctrl.h3376 #define DMA1_TRIG12_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2311 #define DMA1_TRIG12_PIO0_27 IOPCTL_MUX(27, 0) /* PIO0_27 */ macro
DMIMXRT685SFFOB-pinctrl.h2506 #define DMA1_TRIG12_PIO0_27 IOPCTL_MUX(27, 0) /* PIO0_27 */ macro
DMIMXRT685SFVKB-pinctrl.h2506 #define DMA1_TRIG12_PIO0_27 IOPCTL_MUX(27, 0) /* PIO0_27 */ macro