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Searched refs:DMA1_TRIG10_PIO0_25 (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h1216 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S16JBD64-pinctrl.h1625 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S69JBD64-pinctrl.h1636 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S28JBD64-pinctrl.h1636 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S06JBD64-pinctrl.h1569 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S69JBD100-pinctrl.h1636 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S69JEV98-pinctrl.h1636 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S28JBD100-pinctrl.h1636 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S28JEV98-pinctrl.h1636 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S16JBD100-pinctrl.h1625 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S16JEV98-pinctrl.h1625 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
DLPC55S36JBD100-pinctrl.h3137 #define DMA1_TRIG10_PIO0_25 IOCON_MUX(25, IOCON_TYPE_D, 0) /* PIO0_25 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2120 #define DMA1_TRIG10_PIO0_25 IOPCTL_MUX(25, 0) /* PIO0_25 */ macro
DMIMXRT595SFAWC-pinctrl.h2539 #define DMA1_TRIG10_PIO0_25 IOPCTL_MUX(25, 0) /* PIO0_25 */ macro
DMIMXRT595SFFOC-pinctrl.h2541 #define DMA1_TRIG10_PIO0_25 IOPCTL_MUX(25, 0) /* PIO0_25 */ macro
DMIMXRT685SFFOB-pinctrl.h2315 #define DMA1_TRIG10_PIO0_25 IOPCTL_MUX(25, 0) /* PIO0_25 */ macro
DMIMXRT685SFVKB-pinctrl.h2315 #define DMA1_TRIG10_PIO0_25 IOPCTL_MUX(25, 0) /* PIO0_25 */ macro