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Searched refs:DMA0_TRIG7_PIO0_1 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h71 #define DMA0_TRIG7_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
DLPC54114J256UK49-pinctrl.h76 #define DMA0_TRIG7_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
DLPC51U68JBD64-pinctrl.h71 #define DMA0_TRIG7_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
DLPC54114J256BD64-pinctrl.h76 #define DMA0_TRIG7_PIO0_1 IOCON_MUX(1, IOCON_TYPE_D, 0) /* PIO0_1 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h127 #define DMA0_TRIG7_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT595SFAWC-pinctrl.h147 #define DMA0_TRIG7_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT595SFFOC-pinctrl.h149 #define DMA0_TRIG7_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT685SFFOB-pinctrl.h129 #define DMA0_TRIG7_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro
DMIMXRT685SFVKB-pinctrl.h129 #define DMA0_TRIG7_PIO0_1 IOPCTL_MUX(1, 0) /* PIO0_1 */ macro