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Searched refs:DMA0_TRIG5_PIO0_22 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h641 #define DMA0_TRIG5_PIO0_22 IOCON_MUX(22, IOCON_TYPE_D, 0) /* PIO0_22 */ macro
DLPC54114J256UK49-pinctrl.h728 #define DMA0_TRIG5_PIO0_22 IOCON_MUX(22, IOCON_TYPE_D, 0) /* PIO0_22 */ macro
DLPC51U68JBD64-pinctrl.h700 #define DMA0_TRIG5_PIO0_22 IOCON_MUX(22, IOCON_TYPE_D, 0) /* PIO0_22 */ macro
DLPC54114J256BD64-pinctrl.h796 #define DMA0_TRIG5_PIO0_22 IOCON_MUX(22, IOCON_TYPE_D, 0) /* PIO0_22 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h1855 #define DMA0_TRIG5_PIO0_22 IOPCTL_MUX(22, 0) /* PIO0_22 */ macro
DMIMXRT595SFAWC-pinctrl.h2225 #define DMA0_TRIG5_PIO0_22 IOPCTL_MUX(22, 0) /* PIO0_22 */ macro
DMIMXRT595SFFOC-pinctrl.h2227 #define DMA0_TRIG5_PIO0_22 IOPCTL_MUX(22, 0) /* PIO0_22 */ macro
DMIMXRT685SFFOB-pinctrl.h2050 #define DMA0_TRIG5_PIO0_22 IOPCTL_MUX(22, 0) /* PIO0_22 */ macro
DMIMXRT685SFVKB-pinctrl.h2050 #define DMA0_TRIG5_PIO0_22 IOPCTL_MUX(22, 0) /* PIO0_22 */ macro