Home
last modified time | relevance | path

Searched refs:DMA0_TRIG4_PIO1_3 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h981 #define DMA0_TRIG4_PIO1_3 IOCON_MUX(35, IOCON_TYPE_D, 0) /* PIO1_3 */ macro
DLPC54114J256UK49-pinctrl.h1116 #define DMA0_TRIG4_PIO1_3 IOCON_MUX(35, IOCON_TYPE_D, 0) /* PIO1_3 */ macro
DLPC51U68JBD64-pinctrl.h1040 #define DMA0_TRIG4_PIO1_3 IOCON_MUX(35, IOCON_TYPE_D, 0) /* PIO1_3 */ macro
DLPC54114J256BD64-pinctrl.h1184 #define DMA0_TRIG4_PIO1_3 IOCON_MUX(35, IOCON_TYPE_D, 0) /* PIO1_3 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2631 #define DMA0_TRIG4_PIO1_3 IOPCTL_MUX(35, 0) /* PIO1_3 */ macro
DMIMXRT595SFAWC-pinctrl.h3098 #define DMA0_TRIG4_PIO1_3 IOPCTL_MUX(35, 0) /* PIO1_3 */ macro
DMIMXRT595SFFOC-pinctrl.h3100 #define DMA0_TRIG4_PIO1_3 IOPCTL_MUX(35, 0) /* PIO1_3 */ macro
DMIMXRT685SFFOB-pinctrl.h3182 #define DMA0_TRIG4_PIO1_3 IOPCTL_MUX(35, 0) /* PIO1_3 */ macro
DMIMXRT685SFVKB-pinctrl.h3182 #define DMA0_TRIG4_PIO1_3 IOPCTL_MUX(35, 0) /* PIO1_3 */ macro