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Searched refs:DMA0_TRIG3_PIO1_17 (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD64-pinctrl.h1471 #define DMA0_TRIG3_PIO1_17 IOCON_MUX(49, IOCON_TYPE_D, 0) /* PIO1_17 */ macro
DLPC54114J256BD64-pinctrl.h1675 #define DMA0_TRIG3_PIO1_17 IOCON_MUX(49, IOCON_TYPE_D, 0) /* PIO1_17 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h3623 #define DMA0_TRIG3_PIO1_17 IOPCTL_MUX(49, 0) /* PIO1_17 */ macro
DMIMXRT685SFFOB-pinctrl.h4364 #define DMA0_TRIG3_PIO1_17 IOPCTL_MUX(49, 0) /* PIO1_17 */ macro
DMIMXRT685SFVKB-pinctrl.h4364 #define DMA0_TRIG3_PIO1_17 IOPCTL_MUX(49, 0) /* PIO1_17 */ macro