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Searched refs:DMA0_TRIG1_PIO0_26 (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h757 #define DMA0_TRIG1_PIO0_26 IOCON_MUX(26, IOCON_TYPE_D, 0) /* PIO0_26 */ macro
DLPC54114J256UK49-pinctrl.h860 #define DMA0_TRIG1_PIO0_26 IOCON_MUX(26, IOCON_TYPE_D, 0) /* PIO0_26 */ macro
DLPC51U68JBD64-pinctrl.h816 #define DMA0_TRIG1_PIO0_26 IOCON_MUX(26, IOCON_TYPE_D, 0) /* PIO0_26 */ macro
DLPC54114J256BD64-pinctrl.h928 #define DMA0_TRIG1_PIO0_26 IOCON_MUX(26, IOCON_TYPE_D, 0) /* PIO0_26 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2199 #define DMA0_TRIG1_PIO0_26 IOPCTL_MUX(26, 0) /* PIO0_26 */ macro
DMIMXRT685SFFOB-pinctrl.h2394 #define DMA0_TRIG1_PIO0_26 IOPCTL_MUX(26, 0) /* PIO0_26 */ macro
DMIMXRT685SFVKB-pinctrl.h2394 #define DMA0_TRIG1_PIO0_26 IOPCTL_MUX(26, 0) /* PIO0_26 */ macro