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Searched refs:DMA0_TRIG15_PIO1_2 (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h939 #define DMA0_TRIG15_PIO1_2 IOCON_MUX(34, IOCON_TYPE_D, 0) /* PIO1_2 */ macro
DLPC54114J256UK49-pinctrl.h1070 #define DMA0_TRIG15_PIO1_2 IOCON_MUX(34, IOCON_TYPE_D, 0) /* PIO1_2 */ macro
DLPC51U68JBD64-pinctrl.h998 #define DMA0_TRIG15_PIO1_2 IOCON_MUX(34, IOCON_TYPE_D, 0) /* PIO1_2 */ macro
DLPC54114J256BD64-pinctrl.h1138 #define DMA0_TRIG15_PIO1_2 IOCON_MUX(34, IOCON_TYPE_D, 0) /* PIO1_2 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2526 #define DMA0_TRIG15_PIO1_2 IOPCTL_MUX(34, 0) /* PIO1_2 */ macro
DMIMXRT685SFFOB-pinctrl.h3077 #define DMA0_TRIG15_PIO1_2 IOPCTL_MUX(34, 0) /* PIO1_2 */ macro
DMIMXRT685SFVKB-pinctrl.h3077 #define DMA0_TRIG15_PIO1_2 IOPCTL_MUX(34, 0) /* PIO1_2 */ macro