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Searched refs:DMA0_TRIG15_PIO0_17 (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h480 #define DMA0_TRIG15_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 0) /* PIO0_17 */ macro
DLPC54114J256UK49-pinctrl.h547 #define DMA0_TRIG15_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 0) /* PIO0_17 */ macro
DLPC51U68JBD64-pinctrl.h539 #define DMA0_TRIG15_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 0) /* PIO0_17 */ macro
DLPC54114J256BD64-pinctrl.h615 #define DMA0_TRIG15_PIO0_17 IOCON_MUX(17, IOCON_TYPE_D, 0) /* PIO0_17 */ macro
/hal_nxp-3.4.0/dts/nxp/nxp_imx/rt/
DMIMXRT595SFAWC-pinctrl.h1740 #define DMA0_TRIG15_PIO0_17 IOPCTL_MUX(17, 0) /* PIO0_17 */ macro
DMIMXRT595SFFOC-pinctrl.h1742 #define DMA0_TRIG15_PIO0_17 IOPCTL_MUX(17, 0) /* PIO0_17 */ macro
DMIMXRT685SFFOB-pinctrl.h1542 #define DMA0_TRIG15_PIO0_17 IOPCTL_MUX(17, 0) /* PIO0_17 */ macro
DMIMXRT685SFVKB-pinctrl.h1542 #define DMA0_TRIG15_PIO0_17 IOPCTL_MUX(17, 0) /* PIO0_17 */ macro