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Searched refs:DMA0_TRIG05_PIO0_27 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h1335 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S16JBD64-pinctrl.h1745 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S69JBD64-pinctrl.h1757 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S28JBD64-pinctrl.h1757 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S06JBD64-pinctrl.h1688 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S36JHI48-pinctrl.h2899 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S69JBD100-pinctrl.h1757 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S69JEV98-pinctrl.h1757 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S28JBD100-pinctrl.h1757 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S28JEV98-pinctrl.h1757 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S16JBD100-pinctrl.h1745 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S16JEV98-pinctrl.h1745 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro
DLPC55S36JBD100-pinctrl.h3369 #define DMA0_TRIG05_PIO0_27 IOCON_MUX(27, IOCON_TYPE_D, 0) /* PIO0_27 */ macro