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Searched refs:CTIMER0_MATCH0_PIO0_5 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.4.0/dts/nxp/lpc/
DLPC51U68JBD48-pinctrl.h114 #define CTIMER0_MATCH0_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 3) /* PIO0_5 */ macro
DLPC54114J256UK49-pinctrl.h127 #define CTIMER0_MATCH0_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 3) /* PIO0_5 */ macro
DLPC51U68JBD64-pinctrl.h173 #define CTIMER0_MATCH0_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 3) /* PIO0_5 */ macro
DLPC54114J256BD64-pinctrl.h195 #define CTIMER0_MATCH0_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 3) /* PIO0_5 */ macro