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Searched refs:regIndex (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-2.7.6/imx/drivers/
Dmu_imx.c39 mu_status_t MU_TrySendMsg(MU_Type * base, uint32_t regIndex, uint32_t msg) in MU_TrySendMsg() argument
41 assert(regIndex < MU_TR_COUNT); in MU_TrySendMsg()
44 if(MU_IsTxEmpty(base, regIndex)) in MU_TrySendMsg()
46 base->TR[regIndex] = msg; in MU_TrySendMsg()
59 void MU_SendMsg(MU_Type * base, uint32_t regIndex, uint32_t msg) in MU_SendMsg() argument
61 assert(regIndex < MU_TR_COUNT); in MU_SendMsg()
62 uint32_t mask = MU_SR_TE0_MASK >> regIndex; in MU_SendMsg()
65 base->TR[regIndex] = msg; in MU_SendMsg()
74 mu_status_t MU_TryReceiveMsg(MU_Type * base, uint32_t regIndex, uint32_t *msg) in MU_TryReceiveMsg() argument
76 assert(regIndex < MU_RR_COUNT); in MU_TryReceiveMsg()
[all …]
Dmu_imx.h170 mu_status_t MU_TrySendMsg(MU_Type * base, uint32_t regIndex, uint32_t msg);
181 void MU_SendMsg(MU_Type * base, uint32_t regIndex, uint32_t msg);
256 mu_status_t MU_TryReceiveMsg(MU_Type * base, uint32_t regIndex, uint32_t *msg);
267 void MU_ReceiveMsg(MU_Type * base, uint32_t regIndex, uint32_t *msg);
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
Dfsl_pgmc.c234 uint32_t regIndex = 0UL; in PGMC_CPC_CACHE_ControlBySetPointMode() local
242 for (regIndex = 0UL; regIndex < 2UL; regIndex++) in PGMC_CPC_CACHE_ControlBySetPointMode()
244 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_CACHE_ControlBySetPointMode()
248 if (0UL != (setPointMap & (1UL << ((regIndex * 8UL) + setPointIndex)))) in PGMC_CPC_CACHE_ControlBySetPointMode()
334 uint32_t regIndex = 0UL; in PGMC_CPC_LMEM_ControlBySetPointMode() local
342 for (regIndex = 0UL; regIndex < 2UL; regIndex++) in PGMC_CPC_LMEM_ControlBySetPointMode()
344 ptrMemSpCtrlReg += regIndex; in PGMC_CPC_LMEM_ControlBySetPointMode()
348 if (0UL != (setPointMap & (1UL << ((regIndex * 8UL) + setPointIndex)))) in PGMC_CPC_LMEM_ControlBySetPointMode()
Dfsl_pmu.c464 uint8_t regIndex; in PMU_GPCSetLpsrDigLdoTargetVoltage() local
468 for (regIndex = 0U; regIndex < ARRAY_SIZE(lpsrDigTrgRegArray); regIndex++) in PMU_GPCSetLpsrDigLdoTargetVoltage()
470 …temp8 = (((uint8_t)(setpointMap >> (PMU_LDO_LPSR_DIG_TRG_SPX_REG_SETPOINT_COUNTS * regIndex))) & 0… in PMU_GPCSetLpsrDigLdoTargetVoltage()
473 regValue = (*(volatile uint32_t *)lpsrDigTrgRegArray[regIndex]); in PMU_GPCSetLpsrDigLdoTargetVoltage()
482 (*(volatile uint32_t *)lpsrDigTrgRegArray[regIndex]) = regValue; in PMU_GPCSetLpsrDigLdoTargetVoltage()
/hal_nxp-2.7.6/mcux/devices/LPC54114/
Dfsl_reset.c46 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_SetPeripheralReset() local
53 if (regIndex >= SYSCON_PRESETCTRL_COUNT) in RESET_SetPeripheralReset()
69 SYSCON->PRESETCTRLSET[regIndex] = bitMask; in RESET_SetPeripheralReset()
71 while (0u == (SYSCON->PRESETCTRL[regIndex] & bitMask)) in RESET_SetPeripheralReset()
87 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_ClearPeripheralReset() local
94 if (regIndex >= SYSCON_PRESETCTRL_COUNT) in RESET_ClearPeripheralReset()
110 SYSCON->PRESETCTRLCLR[regIndex] = bitMask; in RESET_ClearPeripheralReset()
112 while (bitMask == (SYSCON->PRESETCTRL[regIndex] & bitMask)) in RESET_ClearPeripheralReset()
/hal_nxp-2.7.6/mcux/drivers/imxrt6xx/
Dfsl_mu.c84 void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg) in MU_SendMsg() argument
86 assert(regIndex < MU_TR_COUNT); in MU_SendMsg()
89 while (0U == (base->SR & (((uint32_t)kMU_Tx0EmptyFlag) >> regIndex))) in MU_SendMsg()
94 base->TR[regIndex] = msg; in MU_SendMsg()
106 uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex) in MU_ReceiveMsg() argument
108 assert(regIndex < MU_TR_COUNT); in MU_ReceiveMsg()
111 while (0U == (base->SR & (((uint32_t)kMU_Rx0FullFlag) >> regIndex))) in MU_ReceiveMsg()
116 return base->RR[regIndex]; in MU_ReceiveMsg()
Dfsl_mu.h192 static inline void MU_SendMsgNonBlocking(MU_Type *base, uint32_t regIndex, uint32_t msg) in MU_SendMsgNonBlocking() argument
194 assert(regIndex < MU_TR_COUNT); in MU_SendMsgNonBlocking()
196 base->TR[regIndex] = msg; in MU_SendMsgNonBlocking()
208 void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg);
231 static inline uint32_t MU_ReceiveMsgNonBlocking(MU_Type *base, uint32_t regIndex) in MU_ReceiveMsgNonBlocking() argument
233 assert(regIndex < MU_TR_COUNT); in MU_ReceiveMsgNonBlocking()
235 return base->RR[regIndex]; in MU_ReceiveMsgNonBlocking()
247 uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex);
/hal_nxp-2.7.6/mcux/drivers/imx8/
Dfsl_mu.c84 void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg) in MU_SendMsg() argument
86 assert(regIndex < MU_TR_COUNT); in MU_SendMsg()
89 while (0U == (base->SR & (((uint32_t)kMU_Tx0EmptyFlag) >> regIndex))) in MU_SendMsg()
94 base->TR[regIndex] = msg; in MU_SendMsg()
106 uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex) in MU_ReceiveMsg() argument
108 assert(regIndex < MU_TR_COUNT); in MU_ReceiveMsg()
111 while (0U == (base->SR & (((uint32_t)kMU_Rx0FullFlag) >> regIndex))) in MU_ReceiveMsg()
116 return base->RR[regIndex]; in MU_ReceiveMsg()
Dfsl_mu.h192 static inline void MU_SendMsgNonBlocking(MU_Type *base, uint32_t regIndex, uint32_t msg) in MU_SendMsgNonBlocking() argument
194 assert(regIndex < MU_TR_COUNT); in MU_SendMsgNonBlocking()
196 base->TR[regIndex] = msg; in MU_SendMsgNonBlocking()
208 void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg);
231 static inline uint32_t MU_ReceiveMsgNonBlocking(MU_Type *base, uint32_t regIndex) in MU_ReceiveMsgNonBlocking() argument
233 assert(regIndex < MU_TR_COUNT); in MU_ReceiveMsgNonBlocking()
235 return base->RR[regIndex]; in MU_ReceiveMsgNonBlocking()
247 uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex);
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_mu.c84 void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg) in MU_SendMsg() argument
86 assert(regIndex < MU_TR_COUNT); in MU_SendMsg()
89 while (0U == (base->SR & (((uint32_t)kMU_Tx0EmptyFlag) >> regIndex))) in MU_SendMsg()
94 base->TR[regIndex] = msg; in MU_SendMsg()
106 uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex) in MU_ReceiveMsg() argument
108 assert(regIndex < MU_TR_COUNT); in MU_ReceiveMsg()
111 while (0U == (base->SR & (((uint32_t)kMU_Rx0FullFlag) >> regIndex))) in MU_ReceiveMsg()
116 return base->RR[regIndex]; in MU_ReceiveMsg()
Dfsl_mu.h192 static inline void MU_SendMsgNonBlocking(MU_Type *base, uint32_t regIndex, uint32_t msg) in MU_SendMsgNonBlocking() argument
194 assert(regIndex < MU_TR_COUNT); in MU_SendMsgNonBlocking()
196 base->TR[regIndex] = msg; in MU_SendMsgNonBlocking()
208 void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg);
231 static inline uint32_t MU_ReceiveMsgNonBlocking(MU_Type *base, uint32_t regIndex) in MU_ReceiveMsgNonBlocking() argument
233 assert(regIndex < MU_TR_COUNT); in MU_ReceiveMsgNonBlocking()
235 return base->RR[regIndex]; in MU_ReceiveMsgNonBlocking()
247 uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex);
Dfsl_xbara.c211 uint8_t regIndex; in XBARA_SetOutputSignalConfig() local
217 regIndex = outputIndex / 2U; in XBARA_SetOutputSignalConfig()
220 regVal._u16 = XBARA_CTRLx(base, regIndex); in XBARA_SetOutputSignalConfig()
228 XBARA_CTRLx(base, regIndex) = regVal._u16; in XBARA_SetOutputSignalConfig()
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
Dfsl_reset.c44 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_SetPeripheralReset() local
52 SYSCON->PRESETCTRLSET[regIndex] = bitMask; in RESET_SetPeripheralReset()
54 while (0u == (SYSCON->PRESETCTRLX[regIndex] & bitMask)) in RESET_SetPeripheralReset()
69 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_ClearPeripheralReset() local
78 SYSCON->PRESETCTRLCLR[regIndex] = bitMask; in RESET_ClearPeripheralReset()
80 while (bitMask == (SYSCON->PRESETCTRLX[regIndex] & bitMask)) in RESET_ClearPeripheralReset()
/hal_nxp-2.7.6/mcux/devices/LPC55S28/
Dfsl_reset.c44 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_SetPeripheralReset() local
52 SYSCON->PRESETCTRLSET[regIndex] = bitMask; in RESET_SetPeripheralReset()
54 while (0u == (SYSCON->PRESETCTRLX[regIndex] & bitMask)) in RESET_SetPeripheralReset()
69 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_ClearPeripheralReset() local
78 SYSCON->PRESETCTRLCLR[regIndex] = bitMask; in RESET_ClearPeripheralReset()
80 while (bitMask == (SYSCON->PRESETCTRLX[regIndex] & bitMask)) in RESET_ClearPeripheralReset()
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
Dfsl_reset.c44 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_SetPeripheralReset() local
52 SYSCON->PRESETCTRLSET[regIndex] = bitMask; in RESET_SetPeripheralReset()
54 while (0u == (SYSCON->PRESETCTRLX[regIndex] & bitMask)) in RESET_SetPeripheralReset()
69 const uint32_t regIndex = ((uint32_t)peripheral & 0xFFFF0000u) >> 16; in RESET_ClearPeripheralReset() local
78 SYSCON->PRESETCTRLCLR[regIndex] = bitMask; in RESET_ClearPeripheralReset()
80 while (bitMask == (SYSCON->PRESETCTRLX[regIndex] & bitMask)) in RESET_ClearPeripheralReset()
/hal_nxp-2.7.6/mcux/devices/MIMXRT685S/
Dfsl_reset.c42 const uint32_t regIndex = ((uint32_t)peripheral & 0x0000FF00u) >> 8; in RESET_SetPeripheralReset() local
48 switch (regIndex) in RESET_SetPeripheralReset()
102 const uint32_t regIndex = ((uint32_t)peripheral & 0x0000FF00u) >> 8; in RESET_ClearPeripheralReset() local
108 switch (regIndex) in RESET_ClearPeripheralReset()
/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_xbara.c211 uint8_t regIndex; in XBARA_SetOutputSignalConfig() local
217 regIndex = outputIndex / 2U; in XBARA_SetOutputSignalConfig()
220 regVal._u16 = XBARA_CTRLx(base, regIndex); in XBARA_SetOutputSignalConfig()
228 XBARA_CTRLx(base, regIndex) = regVal._u16; in XBARA_SetOutputSignalConfig()