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/hal_nxp-2.7.6/mcux/middleware/wireless/framework_5.3.3/OSAbstraction/Interface/
Dfsl_os_abstraction.h160 #define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \ argument
164 (priority), \
173 #define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \ argument
177 (priority), \
185 #define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \ argument
188 (priority), \
197 #define OSA_TASK_DEFINE(name, priority, instances, stackSz, useFloat) \ argument
199 (priority), \
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
Dfsl_gpc.h560 …oid GPC_SP_SetSetpointPriority(GPC_SET_POINT_CTRL_Type *base, uint32_t setPoint, uint32_t priority) in GPC_SP_SetSetpointPriority() argument
562 assert(priority < 16UL); in GPC_SP_SetSetpointPriority()
567 base->SP_PRIORITY_0_7 |= (priority << (setPoint * 4UL)); in GPC_SP_SetSetpointPriority()
571 base->SP_PRIORITY_8_15 |= (priority << ((setPoint - 8UL) * 4UL)); in GPC_SP_SetSetpointPriority()
/hal_nxp-2.7.6/mcux/drivers/imx8/
Dfsl_sdma.h331 uint8_t priority; /*!< SDMA channel priority */ member
473 static inline void SDMA_SetChannelPriority(SDMAARM_Type *base, uint32_t channel, uint8_t priority) in SDMA_SetChannelPriority() argument
475 base->SDMA_CHNPRI[channel] = priority; in SDMA_SetChannelPriority()
Dfsl_sdma.c932 if (handle->priority == 0U) in SDMA_StartTransfer()
934 handle->priority = (uint8_t)handle->base->SDMA_CHNPRI[handle->channel]; in SDMA_StartTransfer()
940 SDMA_SetChannelPriority(handle->base, handle->channel, handle->priority); in SDMA_StartTransfer()
/hal_nxp-2.7.6/mcux/drivers/imxrt6xx/
Dfsl_dma.h495 static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority) in DMA_SetChannelPriority() argument
499 …HANNEL[channel].CFG & (~(DMA_CHANNEL_CFG_CHPRIORITY_MASK))) | DMA_CHANNEL_CFG_CHPRIORITY(priority); in DMA_SetChannelPriority()
Dfsl_lpadc.c295 | ADC_TCTRL_TPRI(config->priority) /* Trigger priority setting. */ in LPADC_SetConvTriggerConfig()
334 config->priority = 0U; in LPADC_GetDefaultConvTriggerConfig()
Dfsl_lpadc.h424 …uint32_t priority; /*!< Sets the priority of the associated trigger source. If two or more trigger… member
Dfsl_flexspi.h218 …uint8_t priority; /*!< This priority for AHB Master Read which this AHB RX Buffer is assigned. … member
Dfsl_flexspi.c323 FLEXSPI_AHBRXBUFCR0_PRIORITY(config->ahbConfig.buffer[i].priority) | in FLEXSPI_Init()
/hal_nxp-2.7.6/mcux/drivers/lpc/
Dfsl_dma.h495 static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority) in DMA_SetChannelPriority() argument
499 …HANNEL[channel].CFG & (~(DMA_CHANNEL_CFG_CHPRIORITY_MASK))) | DMA_CHANNEL_CFG_CHPRIORITY(priority); in DMA_SetChannelPriority()
Dfsl_lpadc.c295 | ADC_TCTRL_TPRI(config->priority) /* Trigger priority setting. */ in LPADC_SetConvTriggerConfig()
334 config->priority = 0U; in LPADC_GetDefaultConvTriggerConfig()
Dfsl_lpadc.h424 …uint32_t priority; /*!< Sets the priority of the associated trigger source. If two or more trigger… member
/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_lpadc.c295 | ADC_TCTRL_TPRI(config->priority) /* Trigger priority setting. */ in LPADC_SetConvTriggerConfig()
334 config->priority = 0U; in LPADC_GetDefaultConvTriggerConfig()
Dfsl_enet_qos.h547 uint32_t priority; /*!< Refer to Transmit Queue Priority Mapping register. */ member
556 uint32_t priority; /*!< Rx queue priority. */ member
Dfsl_lpadc.h424 …uint32_t priority; /*!< Sets the priority of the associated trigger source. If two or more trigger… member
Dfsl_flexspi.h218 …uint8_t priority; /*!< This priority for AHB Master Read which this AHB RX Buffer is assigned. … member
Dfsl_flexcan.h888 flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Legacy Rx FIFO receive priority. */ member
938 …flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Enhanced Rx FIFO receive pr… member
Dfsl_enet_qos.c424 …euePrioMap0 |= (uint32_t)ENET_QOS_MAC_TXQ_PRTY_MAP0_PSTQ0(multiqCfg->txQueueConfig[index].priority) in ENET_QOS_SetMacControl()
430 …euePrioMap1 |= (uint32_t)ENET_QOS_MAC_TXQ_PRTY_MAP0_PSTQ0(multiqCfg->txQueueConfig[index].priority) in ENET_QOS_SetMacControl()
443 … rxQueuePrioMap0 |= (uint32_t)ENET_QOS_MAC_RXQ_CTRL_PSRQ0(multiqCfg->rxQueueConfig[index].priority) in ENET_QOS_SetMacControl()
449 … rxQueuePrioMap1 |= (uint32_t)ENET_QOS_MAC_RXQ_CTRL_PSRQ0(multiqCfg->rxQueueConfig[index].priority) in ENET_QOS_SetMacControl()
Dfsl_flexspi.c323 FLEXSPI_AHBRXBUFCR0_PRIORITY(config->ahbConfig.buffer[i].priority) | in FLEXSPI_Init()
Dfsl_flexcan.c2508 …base->CTRL2 = (pRxFifoConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP… in FLEXCAN_SetRxFifoConfig()
2586 …base->CTRL2 = (pConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP_MASK)… in FLEXCAN_SetEnhancedRxFifoConfig()
/hal_nxp-2.7.6/imx/drivers/
Dflexcan.c358 void FLEXCAN_SetMatchPrioCmd(CAN_Type* base, bool priority) in FLEXCAN_SetMatchPrioCmd() argument
363 if (priority) in FLEXCAN_SetMatchPrioCmd()
Dflexcan.h358 void FLEXCAN_SetMatchPrioCmd(CAN_Type* base, bool priority);
/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_flexcan.h888 flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Legacy Rx FIFO receive priority. */ member
938 …flexcan_rx_fifo_priority_t priority; /*!< The FlexCAN Enhanced Rx FIFO receive pr… member
Dfsl_flexcan.c2508 …base->CTRL2 = (pRxFifoConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP… in FLEXCAN_SetRxFifoConfig()
2586 …base->CTRL2 = (pConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP_MASK)… in FLEXCAN_SetEnhancedRxFifoConfig()