1 /*
2  * Copyright 2018-2021, NXP
3  * All rights reserved.
4  *
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #ifndef __FSL_ANACTRL_H__
10 #define __FSL_ANACTRL_H__
11 
12 #include "fsl_common.h"
13 
14 /*!
15  * @addtogroup anactrl
16  * @{
17  */
18 
19 /*******************************************************************************
20  * Definitions
21  ******************************************************************************/
22 /*! @brief ANACTRL driver version. */
23 #define FSL_ANACTRL_DRIVER_VERSION (MAKE_VERSION(2, 2, 0)) /*!< Version 2.2.0. */`
24 
25 /*!
26  * @brief ANACTRL interrupt flags
27  */
28 enum _anactrl_interrupt_flags
29 {
30     kANACTRL_BodVbatFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVBAT_STATUS_MASK, /*!< BOD VBAT Interrupt status before
31                                                                                 Interrupt Enable. */
32     kANACTRL_BodVbatInterruptFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVBAT_INT_STATUS_MASK, /*!< BOD VBAT Interrupt status
33                                                                                             after Interrupt Enable. */
34     kANACTRL_BodVbatPowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODVBAT_VAL_MASK, /*!< Current value of BOD VBAT power
35                                                                                     status output. */
36     kANACTRL_BodCoreFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODCORE_STATUS_MASK,   /*!< BOD CORE Interrupt status before
37                                                                                   Interrupt Enable. */
38     kANACTRL_BodCoreInterruptFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODCORE_INT_STATUS_MASK, /*!< BOD CORE Interrupt status
39                                                                                             after Interrupt Enable. */
40     kANACTRL_BodCorePowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_BODCORE_VAL_MASK,      /*!< Current value of BOD CORE power
41                                                                                          status output. */
42     kANACTRL_DcdcFlag = ANACTRL_BOD_DCDC_INT_STATUS_DCDC_STATUS_MASK,              /*!< DCDC Interrupt status before
43                                                                                          Interrupt Enable. */
44     kANACTRL_DcdcInterruptFlag = ANACTRL_BOD_DCDC_INT_STATUS_DCDC_INT_STATUS_MASK, /*!< DCDC Interrupt status after
45                                                                                         Interrupt Enable. */
46     kANACTRL_DcdcPowerFlag = ANACTRL_BOD_DCDC_INT_STATUS_DCDC_VAL_MASK,            /*!< Current value of DCDC power
47                                                                                        status output. */
48 };
49 
50 /*!
51  * @brief ANACTRL interrupt control
52  */
53 enum _anactrl_interrupt
54 {
55     kANACTRL_BodVbatInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_BODVBAT_INT_ENABLE_MASK, /*!< BOD VBAT interrupt
56                                                                                             control. */
57     kANACTRL_BodCoreInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_BODCORE_INT_ENABLE_MASK, /*!< BOD CORE interrupt
58                                                                                             control. */
59     kANACTRL_DcdcInterruptEnable = ANACTRL_BOD_DCDC_INT_CTRL_DCDC_INT_ENABLE_MASK,       /*!< DCDC interrupt control. */
60 };
61 
62 /*!
63  * @brief ANACTRL status flags
64  */
65 enum _anactrl_flags
66 {
67     kANACTRL_FlashPowerDownFlag = ANACTRL_ANALOG_CTRL_STATUS_FLASH_PWRDWN_MASK,     /*!< Flash power-down status. */
68     kANACTRL_FlashInitErrorFlag = ANACTRL_ANALOG_CTRL_STATUS_FLASH_INIT_ERROR_MASK, /*!< Flash initialization
69                                                                                           error status. */
70 };
71 
72 /*!
73  * @brief ANACTRL FRO192M and XO32M status flags
74  */
75 enum _anactrl_osc_flags
76 {
77     kANACTRL_OutputClkValidFlag      = ANACTRL_FRO192M_STATUS_CLK_VALID_MASK,  /*!< Output clock valid signal. */
78     kANACTRL_CCOThresholdVoltageFlag = ANACTRL_FRO192M_STATUS_ATB_VCTRL_MASK,  /*!< CCO threshold voltage detector
79                                                                                      output (signal vcco_ok). */
80     kANACTRL_XO32MOutputReadyFlag = ANACTRL_XO32M_STATUS_XO_READY_MASK << 16U, /*!< Indicates XO out
81                                                                                     frequency statibilty. */
82 };
83 
84 /*!
85  * @brief Configuration for FRO192M
86  *
87  * This structure holds the configuration settings for the on-chip high-speed Free Running Oscillator. To initialize
88  * this structure to reasonable defaults, call the ANACTRL_GetDefaultFro192MConfig() function and pass a
89  * pointer to your config structure instance.
90  */
91 typedef struct _anactrl_fro192M_config
92 {
93     bool enable12MHzClk; /*!< Enable 12MHz clock. */
94     bool enable96MHzClk; /*!< Enable 96MHz clock. */
95 } anactrl_fro192M_config_t;
96 
97 /*!
98  * @brief Configuration for XO32M
99  *
100  * This structure holds the configuration settings for the 32 MHz crystal oscillator. To initialize this
101  * structure to reasonable defaults, call the ANACTRL_GetDefaultXo32MConfig() function and pass a
102  * pointer to your config structure instance.
103  */
104 typedef struct _anactrl_xo32M_config
105 {
106     bool enableACBufferBypass; /*!< Enable XO AC buffer bypass in pll and top level. */
107 #if !(defined(FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD) && \
108       FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD)
109     bool enablePllUsbOutput; /*!< Enable XO 32 MHz output to USB HS PLL. */
110 #endif                       /* FSL_FEATURE_ANACTRL_HAS_NO_ENABLE_PLL_USB_OUT_BIT_FIELD */
111     bool enableSysCLkOutput; /*!< Enable XO 32 MHz output to CPU system, SCT, and CLKOUT */
112 #if (defined(FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD) && \
113      FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD)
114     bool enableADCOutput; /*!< Enable High speed crystal oscillator output to ADC. */
115 #endif                    /* FSL_FEATURE_ANACTRL_HAS_XO32M_ADC_CLK_MODE_BIF_FIELD */
116 } anactrl_xo32M_config_t;
117 
118 /*******************************************************************************
119  * API
120  ******************************************************************************/
121 
122 #if defined(__cplusplus)
123 extern "C" {
124 #endif
125 
126 /*!
127  * @name Initialization and deinitialization
128  * @{
129  */
130 
131 /*!
132  * @brief Initializes the ANACTRL mode, the module's clock will be enabled by invoking this function.
133  *
134  * @param base ANACTRL peripheral base address.
135  */
136 void ANACTRL_Init(ANACTRL_Type *base);
137 
138 /*!
139  * @brief De-initializes ANACTRL module, the module's clock will be disabled by invoking this function.
140  *
141  * @param base ANACTRL peripheral base address.
142  */
143 void ANACTRL_Deinit(ANACTRL_Type *base);
144 /* @} */
145 
146 /*!
147  * @name Set oscillators
148  * @{
149  */
150 
151 /*!
152  * @brief Configs the on-chip high-speed Free Running Oscillator(FRO192M), such as enabling/disabling 12 MHZ clock
153  * output and enable/disable 96MHZ clock output.
154  *
155  * @param base ANACTRL peripheral base address.
156  * @param config Pointer to FRO192M configuration structure. Refer to @ref anactrl_fro192M_config_t structure.
157  */
158 void ANACTRL_SetFro192M(ANACTRL_Type *base, const anactrl_fro192M_config_t *config);
159 
160 /*!
161  * @brief Gets the default configuration of FRO192M.
162  * The default values are:
163  * @code
164     config->enable12MHzClk = true;
165     config->enable96MHzClk = false;
166     @endcode
167  * @param config Pointer to FRO192M configuration structure. Refer to @ref anactrl_fro192M_config_t structure.
168  */
169 void ANACTRL_GetDefaultFro192MConfig(anactrl_fro192M_config_t *config);
170 
171 /*!
172  * @brief Configs the 32 MHz Crystal oscillator(High-speed crystal oscillator), such as enable/disable output to CPU
173  * system, and so on.
174  *
175  * @param base ANACTRL peripheral base address.
176  * @param config Pointer to XO32M configuration structure. Refer to @ref anactrl_xo32M_config_t structure.
177  */
178 void ANACTRL_SetXo32M(ANACTRL_Type *base, const anactrl_xo32M_config_t *config);
179 
180 /*!
181  * @brief Gets the default configuration of XO32M.
182  * The default values are:
183  * @code
184     config->enableSysCLkOutput = false;
185     config->enableACBufferBypass = false;
186     @endcode
187  * @param config Pointer to XO32M configuration structure. Refer to @ref anactrl_xo32M_config_t structure.
188  */
189 void ANACTRL_GetDefaultXo32MConfig(anactrl_xo32M_config_t *config);
190 
191 /* @} */
192 
193 /*!
194  * @name Measure Frequency
195  * @{
196  */
197 
198 /*!
199  * @brief Measures the frequency of the target clock source.
200  *
201  * This function measures target frequency according to a accurate reference frequency.The formula is:
202  * Ftarget = (CAPVAL * Freference) / ((1<<SCALE)-1)
203  *
204  * @note Both tartget and reference clocks are selectable by programming the target clock select FREQMEAS_TARGET
205  * register in INPUTMUX and reference clock select FREQMEAS_REF register in INPUTMUX.
206  *
207  * @param base ANACTRL peripheral base address.
208  * @param scale Define the power of 2 count that ref counter counts to during measurement, ranges from 2 to 31.
209  * @param refClkFreq frequency of the reference clock.
210  *
211  * @return frequency of the target clock.
212  */
213 uint32_t ANACTRL_MeasureFrequency(ANACTRL_Type *base, uint8_t scale, uint32_t refClkFreq);
214 /* @} */
215 
216 /*!
217  * @name Interrupt Interface
218  * @{
219  */
220 
221 /*!
222  * @brief Enables the ANACTRL interrupts.
223  *
224  * @param base ANACTRL peripheral base address.
225  * @param mask The interrupt mask. Refer to "_anactrl_interrupt" enumeration.
226  */
ANACTRL_EnableInterrupts(ANACTRL_Type * base,uint32_t mask)227 static inline void ANACTRL_EnableInterrupts(ANACTRL_Type *base, uint32_t mask)
228 {
229     base->BOD_DCDC_INT_CTRL |= (0x15U & mask);
230 }
231 
232 /*!
233  * @brief Disables the ANACTRL interrupts.
234  *
235  * @param base ANACTRL peripheral base address.
236  * @param mask The interrupt mask. Refer to "_anactrl_interrupt" enumeration.
237  */
ANACTRL_DisableInterrupts(ANACTRL_Type * base,uint32_t mask)238 static inline void ANACTRL_DisableInterrupts(ANACTRL_Type *base, uint32_t mask)
239 {
240     base->BOD_DCDC_INT_CTRL &= ~(0x15U & mask);
241 }
242 
243 /*!
244  * @brief Clears the ANACTRL interrupts.
245  *
246  * @param base ANACTRL peripheral base address.
247  * @param mask The interrupt mask. Refer to "_anactrl_interrupt" enumeration.
248  */
ANACTRL_ClearInterrupts(ANACTRL_Type * base,uint32_t mask)249 static inline void ANACTRL_ClearInterrupts(ANACTRL_Type *base, uint32_t mask)
250 {
251     base->BOD_DCDC_INT_CTRL |= (uint32_t)(mask << 1UL);
252 }
253 /* @} */
254 
255 /*!
256  * @name Status Interface
257  * @{
258  */
259 
260 /*!
261  * @brief Gets ANACTRL status flags.
262  *
263  * This function gets Analog control status flags. The flags are returned as the logical
264  * OR value of the enumerators @ref _anactrl_flags. To check for a specific status,
265  * compare the return value with enumerators in the @ref _anactrl_flags.
266  * For example, to check whether the flash is in power down mode:
267  * @code
268  *     if (kANACTRL_FlashPowerDownFlag & ANACTRL_ANACTRL_GetStatusFlags(ANACTRL))
269  *     {
270  *         ...
271  *     }
272  * @endcode
273  *
274  * @param base ANACTRL peripheral base address.
275  * @return ANACTRL status flags which are given in the enumerators in the @ref _anactrl_flags.
276  */
ANACTRL_GetStatusFlags(ANACTRL_Type * base)277 static inline uint32_t ANACTRL_GetStatusFlags(ANACTRL_Type *base)
278 {
279     return base->ANALOG_CTRL_STATUS;
280 }
281 
282 /*!
283  * @brief Gets ANACTRL oscillators status flags.
284  *
285  * This function gets Anactrl oscillators status flags. The flags are returned as the logical
286  * OR value of the enumerators @ref _anactrl_osc_flags. To check for a specific status,
287  * compare the return value with enumerators in the @ref _anactrl_osc_flags.
288  * For example, to check whether the FRO192M clock output is valid:
289  * @code
290  *     if (kANACTRL_OutputClkValidFlag & ANACTRL_ANACTRL_GetOscStatusFlags(ANACTRL))
291  *     {
292  *         ...
293  *     }
294  * @endcode
295  *
296  * @param base ANACTRL peripheral base address.
297  * @return ANACTRL oscillators status flags which are given in the enumerators in the @ref _anactrl_osc_flags.
298  */
ANACTRL_GetOscStatusFlags(ANACTRL_Type * base)299 static inline uint32_t ANACTRL_GetOscStatusFlags(ANACTRL_Type *base)
300 {
301     return (base->FRO192M_STATUS & 0xFFU) | ((base->XO32M_STATUS & 0xFFU) << 16U);
302 }
303 
304 /*!
305  * @brief Gets ANACTRL interrupt status flags.
306  *
307  * This function gets Anactrl interrupt status flags. The flags are returned as the logical
308  * OR value of the enumerators @ref _anactrl_interrupt_flags. To check for a specific status,
309  * compare the return value with enumerators in the @ref _anactrl_interrupt_flags.
310  * For example, to check whether the VBAT voltage level is above the threshold:
311  * @code
312  *     if (kANACTRL_BodVbatPowerFlag & ANACTRL_ANACTRL_GetInterruptStatusFlags(ANACTRL))
313  *     {
314  *         ...
315  *     }
316  * @endcode
317  *
318  * @param base ANACTRL peripheral base address.
319  * @return ANACTRL oscillators status flags which are given in the enumerators in the @ref _anactrl_osc_flags.
320  */
ANACTRL_GetInterruptStatusFlags(ANACTRL_Type * base)321 static inline uint32_t ANACTRL_GetInterruptStatusFlags(ANACTRL_Type *base)
322 {
323     return base->BOD_DCDC_INT_STATUS & 0x1FFU;
324 }
325 /* @} */
326 
327 #if defined(__cplusplus)
328 }
329 #endif
330 
331 /* @}*/
332 
333 #endif /* __FSL_ANACTRL_H__ */
334