1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef _FSL_ECSPI_H_
9 #define _FSL_ECSPI_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup ecspi_driver
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*@{*/
24 /*! @brief ECSPI driver version 2.1.0. */
25 #define FSL_ECSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
26 /*@}*/
27
28 #ifndef ECSPI_DUMMYDATA
29 /*! @brief ECSPI dummy transfer data, the data is sent while txBuff is NULL. */
30 #define ECSPI_DUMMYDATA (0xFFFFFFFFU)
31 #endif
32
33 /*! @brief Retry times for waiting flag. */
34 #ifndef SPI_RETRY_TIMES
35 #define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */
36 #endif
37
38 /*! @brief Return status for the ECSPI driver. */
39 enum
40 {
41 kStatus_ECSPI_Busy = MAKE_STATUS(kStatusGroup_ECSPI, 0), /*!< ECSPI bus is busy */
42 kStatus_ECSPI_Idle = MAKE_STATUS(kStatusGroup_ECSPI, 1), /*!< ECSPI is idle */
43 kStatus_ECSPI_Error = MAKE_STATUS(kStatusGroup_ECSPI, 2), /*!< ECSPI error */
44 kStatus_ECSPI_HardwareOverFlow = MAKE_STATUS(kStatusGroup_ECSPI, 3), /*!< ECSPI hardware overflow */
45 kStatus_ECSPI_Timeout = MAKE_STATUS(kStatusGroup_ECSPI, 4), /*!< ECSPI timeout polling status flags. */
46 };
47
48 /*! @brief ECSPI clock polarity configuration. */
49 typedef enum _ecspi_clock_polarity
50 {
51 kECSPI_PolarityActiveHigh = 0x0U, /*!< Active-high ECSPI polarity high (idles low). */
52 kECSPI_PolarityActiveLow, /*!< Active-low ECSPI polarity low (idles high). */
53 } ecspi_clock_polarity_t;
54
55 /*! @brief ECSPI clock phase configuration. */
56 typedef enum _ecspi_clock_phase
57 {
58 kECSPI_ClockPhaseFirstEdge =
59 0x0U, /*!< First edge on SPSCK occurs at the middle of the first cycle of a data transfer. */
60 kECSPI_ClockPhaseSecondEdge, /*!< First edge on SPSCK occurs at the start of the first cycle of a data transfer. */
61 } ecspi_clock_phase_t;
62
63 /*! @brief ECSPI interrupt sources. */
64 enum
65 {
66 kECSPI_TxfifoEmptyInterruptEnable = ECSPI_INTREG_TEEN_MASK, /*!< Transmit FIFO buffer empty interrupt */
67 kECSPI_TxFifoDataRequstInterruptEnable = ECSPI_INTREG_TDREN_MASK, /*!< Transmit FIFO data requst interrupt */
68 kECSPI_TxFifoFullInterruptEnable = ECSPI_INTREG_TFEN_MASK, /*!< Transmit FIFO full interrupt */
69 kECSPI_RxFifoReadyInterruptEnable = ECSPI_INTREG_RREN_MASK, /*!< Receiver FIFO ready interrupt */
70 kECSPI_RxFifoDataRequstInterruptEnable = ECSPI_INTREG_RDREN_MASK, /*!< Receiver FIFO data requst interrupt */
71 kECSPI_RxFifoFullInterruptEnable = ECSPI_INTREG_RFEN_MASK, /*!< Receiver FIFO full interrupt */
72 kECSPI_RxFifoOverFlowInterruptEnable = ECSPI_INTREG_ROEN_MASK, /*!< Receiver FIFO buffer overflow interrupt */
73 kECSPI_TransferCompleteInterruptEnable = ECSPI_INTREG_TCEN_MASK, /*!< Transfer complete interrupt */
74 kECSPI_AllInterruptEnable = (ECSPI_INTREG_TEEN_MASK | ECSPI_INTREG_TDREN_MASK | ECSPI_INTREG_TFEN_MASK |
75 ECSPI_INTREG_RREN_MASK | ECSPI_INTREG_RDREN_MASK | ECSPI_INTREG_RFEN_MASK |
76 ECSPI_INTREG_ROEN_MASK | ECSPI_INTREG_TCEN_MASK), /*!< All interrupt */
77 };
78
79 /*! @brief ECSPI status flags. */
80 enum
81 {
82 kECSPI_TxfifoEmptyFlag = ECSPI_STATREG_TE_MASK, /*!< Transmit FIFO buffer empty flag */
83 kECSPI_TxFifoDataRequstFlag = ECSPI_STATREG_TDR_MASK, /*!< Transmit FIFO data requst flag */
84 kECSPI_TxFifoFullFlag = ECSPI_STATREG_TF_MASK, /*!< Transmit FIFO full flag */
85 kECSPI_RxFifoReadyFlag = ECSPI_STATREG_RR_MASK, /*!< Receiver FIFO ready flag */
86 kECSPI_RxFifoDataRequstFlag = ECSPI_STATREG_RDR_MASK, /*!< Receiver FIFO data requst flag */
87 kECSPI_RxFifoFullFlag = ECSPI_STATREG_RF_MASK, /*!< Receiver FIFO full flag */
88 kECSPI_RxFifoOverFlowFlag = ECSPI_STATREG_RO_MASK, /*!< Receiver FIFO buffer overflow flag */
89 kECSPI_TransferCompleteFlag = ECSPI_STATREG_TC_MASK, /*!< Transfer complete flag */
90 };
91 /*! @brief ECSPI DMA enable.*/
92 enum
93 {
94 kECSPI_TxDmaEnable = ECSPI_DMAREG_TEDEN_MASK, /*!< Tx DMA request source */
95 kECSPI_RxDmaEnable = ECSPI_DMAREG_RXDEN_MASK, /*!< Rx DMA request source */
96 kECSPI_DmaAllEnable = (ECSPI_DMAREG_TEDEN_MASK | ECSPI_DMAREG_RXDEN_MASK) /*!< All DMA request source*/
97 };
98
99 /*! @brief ECSPI SPI_RDY signal configuration. */
100 typedef enum _ecspi_data_ready
101 {
102 kECSPI_DataReadyIgnore = 0x0U, /*!< SPI_RDY signal is ignored */
103 kECSPI_DataReadyFallingEdge, /*!< SPI_RDY signal will be triggerd by the falling edge */
104 kECSPI_DataReadyLowLevel, /*!< SPI_RDY signal will be triggerd by a low level */
105 } ecspi_Data_ready_t;
106
107 /*! @brief ECSPI channel select source. */
108 typedef enum _ecspi_channel_source
109 {
110 kECSPI_Channel0 = 0x0U, /*!< Channel 0 is selectd */
111 kECSPI_Channel1, /*!< Channel 1 is selectd */
112 kECSPI_Channel2, /*!< Channel 2 is selectd */
113 kECSPI_Channel3, /*!< Channel 3 is selectd */
114 } ecspi_channel_source_t;
115
116 /*! @brief ECSPI master or slave mode configuration. */
117 typedef enum _ecspi_master_slave_mode
118 {
119 kECSPI_Slave = 0U, /*!< ECSPI peripheral operates in slave mode.*/
120 kECSPI_Master, /*!< ECSPI peripheral operates in master mode.*/
121 } ecspi_master_slave_mode_t;
122
123 /*! @brief ECSPI data line inactive state configuration. */
124 typedef enum _ecspi_data_line_inactive_state_t
125 {
126 kECSPI_DataLineInactiveStateHigh = 0x0U, /*!< The data line inactive state stays high. */
127 kECSPI_DataLineInactiveStateLow, /*!< The data line inactive state stays low. */
128 } ecspi_data_line_inactive_state_t;
129
130 /*! @brief ECSPI clock inactive state configuration. */
131 typedef enum _ecspi_clock_inactive_state_t
132 {
133 kECSPI_ClockInactiveStateLow = 0x0U, /*!< The SCLK inactive state stays low. */
134 kECSPI_ClockInactiveStateHigh, /*!< The SCLK inactive state stays high. */
135 } ecspi_clock_inactive_state_t;
136
137 /*! @brief ECSPI active state configuration.*/
138 typedef enum _ecspi_chip_select_active_state_t
139 {
140 kECSPI_ChipSelectActiveStateLow = 0x0U, /*!< The SS signal line active stays low. */
141 kECSPI_ChipSelectActiveStateHigh, /*!< The SS signal line active stays high. */
142 } ecspi_chip_select_active_state_t;
143
144 /*! @brief ECSPI wave form configuration.*/
145 typedef enum _ecspi_wave_form_t
146 {
147 kECSPI_WaveFormSingle = 0x0U, /*!< The wave form for signal burst */
148 kECSPI_WaveFormMultiple, /*!< The wave form for multiple burst */
149 } ecspi_wave_form_t;
150
151 /*! @brief ECSPI sample period clock configuration.*/
152 typedef enum _ecspi_sample_period_clock_source
153 {
154 kECSPI_spiClock = 0x0U, /*!< The sample period clock source is SCLK. */
155 kECSPI_lowFreqClock, /*!< The sample seriod clock source is low_frequency reference clock(32.768 kHz). */
156 } ecspi_sample_period_clock_source_t;
157
158 /*! @brief ECSPI user channel configure structure.*/
159 typedef struct _ecspi_channel_config
160 {
161 ecspi_master_slave_mode_t channelMode; /*!< Channel mode */
162 ecspi_clock_inactive_state_t clockInactiveState; /*!< Clock line (SCLK) inactive state */
163 ecspi_data_line_inactive_state_t dataLineInactiveState; /*!< Data line (MOSI&MISO) inactive state */
164 ecspi_chip_select_active_state_t chipSlectActiveState; /*!< Chip select(SS) line active state */
165 ecspi_wave_form_t waveForm; /*!< Wave form */
166 ecspi_clock_polarity_t polarity; /*!< Clock polarity */
167 ecspi_clock_phase_t phase; /*!< Clock phase */
168 } ecspi_channel_config_t;
169
170 /*! @brief ECSPI master configure structure.*/
171 typedef struct _ecspi_master_config
172 {
173 ecspi_channel_source_t channel; /*!< Channel number */
174 ecspi_channel_config_t channelConfig; /*!< Channel configuration */
175 ecspi_sample_period_clock_source_t samplePeriodClock; /*!< Sample period clock source */
176
177 uint8_t burstLength; /*!< Burst length */
178 uint8_t chipSelectDelay; /*!< SS delay time */
179 uint16_t samplePeriod; /*!< Sample period */
180 uint8_t txFifoThreshold; /*!< TX Threshold */
181 uint8_t rxFifoThreshold; /*!< RX Threshold */
182 uint32_t baudRate_Bps; /*!< ECSPI baud rate for master mode */
183 bool enableLoopback; /*!< Enable the ECSPI loopback test. */
184 } ecspi_master_config_t;
185
186 /*! @brief ECSPI slave configure structure.*/
187 typedef struct _ecspi_slave_config
188 {
189 ecspi_channel_source_t channel; /*Channel number */
190 uint8_t burstLength; /*!< Burst length */
191 uint8_t txFifoThreshold; /*!< TX Threshold */
192 uint8_t rxFifoThreshold; /*!< RX Threshold */
193 ecspi_channel_config_t channelConfig; /*!< Channel configuration */
194 } ecspi_slave_config_t;
195
196 /*! @brief ECSPI transfer structure */
197 typedef struct _ecspi_transfer
198 {
199 uint32_t *txData; /*!< Send buffer */
200 uint32_t *rxData; /*!< Receive buffer */
201 size_t dataSize; /*!< Transfer bytes */
202 ecspi_channel_source_t channel; /*!< ECSPI channel select */
203 } ecspi_transfer_t;
204
205 typedef struct _ecspi_master_handle ecspi_master_handle_t;
206 /*! @brief Slave handle is the same with master handle */
207 typedef ecspi_master_handle_t ecspi_slave_handle_t;
208
209 /*! @brief ECSPI master callback for finished transmit */
210 typedef void (*ecspi_master_callback_t)(ECSPI_Type *base,
211 ecspi_master_handle_t *handle,
212 status_t status,
213 void *userData);
214
215 /*! @brief ECSPI slave callback for finished transmit */
216 typedef void (*ecspi_slave_callback_t)(ECSPI_Type *base, ecspi_slave_handle_t *handle, status_t status, void *userData);
217
218 /*! @brief ECSPI master handle structure */
219 struct _ecspi_master_handle
220 {
221 ecspi_channel_source_t channel; /*!< Channel number */
222 uint32_t *volatile txData; /*!< Transfer buffer */
223 uint32_t *volatile rxData; /*!< Receive buffer */
224 volatile size_t txRemainingBytes; /*!< Send data remaining in bytes */
225 volatile size_t rxRemainingBytes; /*!< Receive data remaining in bytes */
226 volatile uint32_t state; /*!< ECSPI internal state */
227 size_t transferSize; /*!< Bytes to be transferred */
228 ecspi_master_callback_t callback; /*!< ECSPI callback */
229 void *userData; /*!< Callback parameter */
230 };
231
232 #if defined(__cplusplus)
233 extern "C" {
234 #endif
235 /*******************************************************************************
236 * APIs
237 ******************************************************************************/
238 /*!
239 * @brief Get the instance for ECSPI module.
240 *
241 * @param base ECSPI base address
242 */
243 uint32_t ECSPI_GetInstance(ECSPI_Type *base);
244
245 /*!
246 * @name Initialization and deinitialization
247 * @{
248 */
249
250 /*!
251 * @brief Sets the ECSPI configuration structure to default values.
252 *
253 * The purpose of this API is to get the configuration structure initialized for use in ECSPI_MasterInit().
254 * User may use the initialized structure unchanged in ECSPI_MasterInit, or modify
255 * some fields of the structure before calling ECSPI_MasterInit. After calling this API,
256 * the master is ready to transfer.
257 * Example:
258 @code
259 ecspi_master_config_t config;
260 ECSPI_MasterGetDefaultConfig(&config);
261 @endcode
262 *
263 * @param config pointer to config structure
264 */
265 void ECSPI_MasterGetDefaultConfig(ecspi_master_config_t *config);
266
267 /*!
268 * @brief Initializes the ECSPI with configuration.
269 *
270 * The configuration structure can be filled by user from scratch, or be set with default
271 * values by ECSPI_MasterGetDefaultConfig(). After calling this API, the slave is ready to transfer.
272 * Example
273 @code
274 ecspi_master_config_t config = {
275 .baudRate_Bps = 400000,
276 ...
277 };
278 ECSPI_MasterInit(ECSPI0, &config);
279 @endcode
280 *
281 * @param base ECSPI base pointer
282 * @param config pointer to master configuration structure
283 * @param srcClock_Hz Source clock frequency.
284 */
285 void ECSPI_MasterInit(ECSPI_Type *base, const ecspi_master_config_t *config, uint32_t srcClock_Hz);
286
287 /*!
288 * @brief Sets the ECSPI configuration structure to default values.
289 *
290 * The purpose of this API is to get the configuration structure initialized for use in ECSPI_SlaveInit().
291 * User may use the initialized structure unchanged in ECSPI_SlaveInit(), or modify
292 * some fields of the structure before calling ECSPI_SlaveInit(). After calling this API,
293 * the master is ready to transfer.
294 * Example:
295 @code
296 ecspi_Slaveconfig_t config;
297 ECSPI_SlaveGetDefaultConfig(&config);
298 @endcode
299 *
300 * @param config pointer to config structure
301 */
302 void ECSPI_SlaveGetDefaultConfig(ecspi_slave_config_t *config);
303
304 /*!
305 * @brief Initializes the ECSPI with configuration.
306 *
307 * The configuration structure can be filled by user from scratch, or be set with default
308 * values by ECSPI_SlaveGetDefaultConfig(). After calling this API, the slave is ready to transfer.
309 * Example
310 @code
311 ecspi_Salveconfig_t config = {
312 .baudRate_Bps = 400000,
313 ...
314 };
315 ECSPI_SlaveInit(ECSPI1, &config);
316 @endcode
317 *
318 * @param base ECSPI base pointer
319 * @param config pointer to master configuration structure
320 */
321 void ECSPI_SlaveInit(ECSPI_Type *base, const ecspi_slave_config_t *config);
322
323 /*!
324 * @brief De-initializes the ECSPI.
325 *
326 * Calling this API resets the ECSPI module, gates the ECSPI clock.
327 * The ECSPI module can't work unless calling the ECSPI_MasterInit/ECSPI_SlaveInit to initialize module.
328 *
329 * @param base ECSPI base pointer
330 */
331 void ECSPI_Deinit(ECSPI_Type *base);
332
333 /*!
334 * @brief Enables or disables the ECSPI.
335 *
336 * @param base ECSPI base pointer
337 * @param enable pass true to enable module, false to disable module
338 */
ECSPI_Enable(ECSPI_Type * base,bool enable)339 static inline void ECSPI_Enable(ECSPI_Type *base, bool enable)
340 {
341 if (enable)
342 {
343 base->CONREG |= ECSPI_CONREG_EN_MASK;
344 }
345 else
346 {
347 base->CONREG &= ~ECSPI_CONREG_EN_MASK;
348 }
349 }
350 /*! @} */
351
352 /*!
353 * @name Status
354 * @{
355 */
356
357 /*!
358 * @brief Gets the status flag.
359 *
360 * @param base ECSPI base pointer
361 * @return ECSPI Status, use status flag to AND _ecspi_flags could get the related status.
362 */
ECSPI_GetStatusFlags(ECSPI_Type * base)363 static inline uint32_t ECSPI_GetStatusFlags(ECSPI_Type *base)
364 {
365 return (base->STATREG);
366 }
367
368 /*!
369 * @brief Clear the status flag.
370 *
371 * @param base ECSPI base pointer
372 * @param mask ECSPI Status, use status flag to AND _ecspi_flags could get the related status.
373 */
ECSPI_ClearStatusFlags(ECSPI_Type * base,uint32_t mask)374 static inline void ECSPI_ClearStatusFlags(ECSPI_Type *base, uint32_t mask)
375 {
376 base->STATREG |= mask;
377 }
378 /*! @} */
379
380 /*!
381 * @name Interrupts
382 * @{
383 */
384
385 /*!
386 * @brief Enables the interrupt for the ECSPI.
387 *
388 * @param base ECSPI base pointer
389 * @param mask ECSPI interrupt source. The parameter can be any combination of the following values:
390 * @arg kECSPI_TxfifoEmptyInterruptEnable
391 * @arg kECSPI_TxFifoDataRequstInterruptEnable
392 * @arg kECSPI_TxFifoFullInterruptEnable
393 * @arg kECSPI_RxFifoReadyInterruptEnable
394 * @arg kECSPI_RxFifoDataRequstInterruptEnable
395 * @arg kECSPI_RxFifoFullInterruptEnable
396 * @arg kECSPI_RxFifoOverFlowInterruptEnable
397 * @arg kECSPI_TransferCompleteInterruptEnable
398 * @arg kECSPI_AllInterruptEnable
399 */
ECSPI_EnableInterrupts(ECSPI_Type * base,uint32_t mask)400 static inline void ECSPI_EnableInterrupts(ECSPI_Type *base, uint32_t mask)
401 {
402 base->INTREG |= mask;
403 }
404
405 /*!
406 * @brief Disables the interrupt for the ECSPI.
407 *
408 * @param base ECSPI base pointer
409 * @param mask ECSPI interrupt source. The parameter can be any combination of the following values:
410 * @arg kECSPI_TxfifoEmptyInterruptEnable
411 * @arg kECSPI_TxFifoDataRequstInterruptEnable
412 * @arg kECSPI_TxFifoFullInterruptEnable
413 * @arg kECSPI_RxFifoReadyInterruptEnable
414 * @arg kECSPI_RxFifoDataRequstInterruptEnable
415 * @arg kECSPI_RxFifoFullInterruptEnable
416 * @arg kECSPI_RxFifoOverFlowInterruptEnable
417 * @arg kECSPI_TransferCompleteInterruptEnable
418 * @arg kECSPI_AllInterruptEnable
419 */
ECSPI_DisableInterrupts(ECSPI_Type * base,uint32_t mask)420 static inline void ECSPI_DisableInterrupts(ECSPI_Type *base, uint32_t mask)
421 {
422 base->INTREG &= ~(mask);
423 }
424 /*! @} */
425
426 /*!
427 * @name Software Reset
428 * @{
429 */
430
431 /*!
432 * @brief Software reset.
433 *
434 * @param base ECSPI base pointer
435 */
ECSPI_SoftwareReset(ECSPI_Type * base)436 static inline void ECSPI_SoftwareReset(ECSPI_Type *base)
437 {
438 /* Disables the block and resets the internal logic with the exception of the ECSPI control register */
439 base->CONREG &= ~ECSPI_CONREG_EN_MASK;
440 /* Software reset can not reset the control register, so clear the control register manually */
441 base->CONREG = 0x0U;
442 }
443 /*! @} */
444
445 /*!
446 * @name Channel mode check
447 * @{
448 */
449
450 /*!
451 * @brief Mode check
452 *
453 * @param base ECSPI base pointer
454 * @param channel ECSPI channel source
455 * @return mode of channel
456 */
ECSPI_IsMaster(ECSPI_Type * base,ecspi_channel_source_t channel)457 static inline bool ECSPI_IsMaster(ECSPI_Type *base, ecspi_channel_source_t channel)
458 {
459 return (bool)(((base->CONREG & ECSPI_CONREG_CHANNEL_MODE_MASK) >>
460 (ECSPI_CONREG_CHANNEL_MODE_SHIFT + (uint32_t)channel)) &
461 0x1U);
462 }
463 /*! @} */
464
465 /*!
466 * @name DMA Control
467 * @{
468 */
469
470 /*!
471 * @brief Enables the DMA source for ECSPI.
472 *
473 * @param base ECSPI base pointer
474 * @param mask ECSPI DMA source. The parameter can be any of the following values:
475 * @arg kECSPI_TxDmaEnable
476 * @arg kECSPI_RxDmaEnable
477 * @arg kECSPI_DmaAllEnable
478 * @param enable True means enable DMA, false means disable DMA
479 */
ECSPI_EnableDMA(ECSPI_Type * base,uint32_t mask,bool enable)480 static inline void ECSPI_EnableDMA(ECSPI_Type *base, uint32_t mask, bool enable)
481 {
482 if (enable)
483 {
484 base->DMAREG |= mask;
485 }
486 else
487 {
488 base->DMAREG &= ~mask;
489 }
490 }
491 /*! @} */
492
493 /*!
494 * @name FIFO Operation
495 * @{
496 */
497
498 /*!
499 * @brief Get the Tx FIFO data count.
500 *
501 * @param base ECSPI base pointer.
502 * @return the number of words in Tx FIFO buffer.
503 */
ECSPI_GetTxFifoCount(ECSPI_Type * base)504 static inline uint8_t ECSPI_GetTxFifoCount(ECSPI_Type *base)
505 {
506 return (uint8_t)((base->TESTREG & ECSPI_TESTREG_TXCNT_MASK) >> ECSPI_TESTREG_TXCNT_SHIFT);
507 }
508
509 /*!
510 * @brief Get the Rx FIFO data count.
511 *
512 * @param base ECSPI base pointer.
513 * @return the number of words in Rx FIFO buffer.
514 */
ECSPI_GetRxFifoCount(ECSPI_Type * base)515 static inline uint8_t ECSPI_GetRxFifoCount(ECSPI_Type *base)
516 {
517 return (uint8_t)((base->TESTREG & ECSPI_TESTREG_RXCNT_MASK) >> ECSPI_TESTREG_RXCNT_SHIFT);
518 }
519 /*! @} */
520
521 /*!
522 * @name Bus Operations
523 * @{
524 */
525
526 /*!
527 * @brief Set channel select for transfer.
528 *
529 * @param base ECSPI base pointer
530 * @param channel Channel source.
531 */
ECSPI_SetChannelSelect(ECSPI_Type * base,ecspi_channel_source_t channel)532 static inline void ECSPI_SetChannelSelect(ECSPI_Type *base, ecspi_channel_source_t channel)
533 {
534 /* Clear Channel select bits in CONREG register */
535 uint32_t temp = base->CONREG & (~(ECSPI_CONREG_CHANNEL_SELECT_MASK));
536 /* Set channel select bits */
537 base->CONREG = (temp | ECSPI_CONREG_CHANNEL_SELECT(channel));
538 }
539 /*!
540 * @brief Set channel select configuration for transfer.
541 *
542 * The purpose of this API is to set the channel will be use to transfer.
543 * User may use this API after instance has been initialized or before transfer start.
544 * The configuration structure _ecspi_channel_config_ can be filled by user from scratch.
545 * After calling this API, user can select this channel as transfer channel.
546 *
547 * @param base ECSPI base pointer
548 * @param channel Channel source.
549 * @param config Configuration struct of channel
550 */
551 void ECSPI_SetChannelConfig(ECSPI_Type *base, ecspi_channel_source_t channel, const ecspi_channel_config_t *config);
552
553 /*!
554 * @brief Sets the baud rate for ECSPI transfer. This is only used in master.
555 *
556 * @param base ECSPI base pointer
557 * @param baudRate_Bps baud rate needed in Hz.
558 * @param srcClock_Hz ECSPI source clock frequency in Hz.
559 */
560 void ECSPI_SetBaudRate(ECSPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
561
562 /*!
563 * @brief Sends a buffer of data bytes using a blocking method.
564 *
565 * @note This function blocks via polling until all bytes have been sent.
566 *
567 * @param base ECSPI base pointer
568 * @param buffer The data bytes to send
569 * @param size The number of data bytes to send
570 * @retval kStatus_Success Successfully start a transfer.
571 * @retval kStatus_ECSPI_Timeout The transfer timed out and was aborted.
572 */
573 status_t ECSPI_WriteBlocking(ECSPI_Type *base, uint32_t *buffer, size_t size);
574
575 /*!
576 * @brief Writes a data into the ECSPI data register.
577 *
578 * @param base ECSPI base pointer
579 * @param data Data needs to be write.
580 */
ECSPI_WriteData(ECSPI_Type * base,uint32_t data)581 static inline void ECSPI_WriteData(ECSPI_Type *base, uint32_t data)
582 {
583 base->TXDATA = data;
584 }
585
586 /*!
587 * @brief Gets a data from the ECSPI data register.
588 *
589 * @param base ECSPI base pointer
590 * @return Data in the register.
591 */
ECSPI_ReadData(ECSPI_Type * base)592 static inline uint32_t ECSPI_ReadData(ECSPI_Type *base)
593 {
594 return (uint32_t)(base->RXDATA);
595 }
596 /*! @} */
597
598 /*!
599 * @name Transactional
600 * @{
601 */
602 /*!
603 * @brief Initializes the ECSPI master handle.
604 *
605 * This function initializes the ECSPI master handle which can be used for other ECSPI master transactional APIs.
606 * Usually,
607 * for a specified ECSPI instance, call this API once to get the initialized handle.
608 *
609 * @param base ECSPI peripheral base address.
610 * @param handle ECSPI handle pointer.
611 * @param callback Callback function.
612 * @param userData User data.
613 */
614 void ECSPI_MasterTransferCreateHandle(ECSPI_Type *base,
615 ecspi_master_handle_t *handle,
616 ecspi_master_callback_t callback,
617 void *userData);
618
619 /*!
620 * @brief Transfers a block of data using a polling method.
621 *
622 * @param base SPI base pointer
623 * @param xfer pointer to spi_xfer_config_t structure
624 * @retval kStatus_Success Successfully start a transfer.
625 * @retval kStatus_InvalidArgument Input argument is invalid.
626 * @retval kStatus_ECSPI_Timeout The transfer timed out and was aborted.
627 */
628 status_t ECSPI_MasterTransferBlocking(ECSPI_Type *base, ecspi_transfer_t *xfer);
629
630 /*!
631 * @brief Performs a non-blocking ECSPI interrupt transfer.
632 *
633 * @note The API immediately returns after transfer initialization is finished.
634 * @note If ECSPI transfer data frame size is 16 bits, the transfer size cannot be an odd number.
635 *
636 * @param base ECSPI peripheral base address.
637 * @param handle pointer to ecspi_master_handle_t structure which stores the transfer state
638 * @param xfer pointer to ecspi_transfer_t structure
639 * @retval kStatus_Success Successfully start a transfer.
640 * @retval kStatus_InvalidArgument Input argument is invalid.
641 * @retval kStatus_ECSPI_Busy ECSPI is not idle, is running another transfer.
642 */
643 status_t ECSPI_MasterTransferNonBlocking(ECSPI_Type *base, ecspi_master_handle_t *handle, ecspi_transfer_t *xfer);
644
645 /*!
646 * @brief Gets the bytes of the ECSPI interrupt transferred.
647 *
648 * @param base ECSPI peripheral base address.
649 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
650 * @param count Transferred bytes of ECSPI master.
651 * @retval kStatus_ECSPI_Success Succeed get the transfer count.
652 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
653 */
654 status_t ECSPI_MasterTransferGetCount(ECSPI_Type *base, ecspi_master_handle_t *handle, size_t *count);
655
656 /*!
657 * @brief Aborts an ECSPI transfer using interrupt.
658 *
659 * @param base ECSPI peripheral base address.
660 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
661 */
662 void ECSPI_MasterTransferAbort(ECSPI_Type *base, ecspi_master_handle_t *handle);
663
664 /*!
665 * @brief Interrupts the handler for the ECSPI.
666 *
667 * @param base ECSPI peripheral base address.
668 * @param handle pointer to ecspi_master_handle_t structure which stores the transfer state.
669 */
670 void ECSPI_MasterTransferHandleIRQ(ECSPI_Type *base, ecspi_master_handle_t *handle);
671
672 /*!
673 * @brief Initializes the ECSPI slave handle.
674 *
675 * This function initializes the ECSPI slave handle which can be used for other ECSPI slave transactional APIs. Usually,
676 * for a specified ECSPI instance, call this API once to get the initialized handle.
677 *
678 * @param base ECSPI peripheral base address.
679 * @param handle ECSPI handle pointer.
680 * @param callback Callback function.
681 * @param userData User data.
682 */
683 void ECSPI_SlaveTransferCreateHandle(ECSPI_Type *base,
684 ecspi_slave_handle_t *handle,
685 ecspi_slave_callback_t callback,
686 void *userData);
687
688 /*!
689 * @brief Performs a non-blocking ECSPI slave interrupt transfer.
690 *
691 * @note The API returns immediately after the transfer initialization is finished.
692 *
693 * @param base ECSPI peripheral base address.
694 * @param handle pointer to ecspi_master_handle_t structure which stores the transfer state
695 * @param xfer pointer to ecspi_transfer_t structure
696 * @retval kStatus_Success Successfully start a transfer.
697 * @retval kStatus_InvalidArgument Input argument is invalid.
698 * @retval kStatus_ECSPI_Busy ECSPI is not idle, is running another transfer.
699 */
ECSPI_SlaveTransferNonBlocking(ECSPI_Type * base,ecspi_slave_handle_t * handle,ecspi_transfer_t * xfer)700 static inline status_t ECSPI_SlaveTransferNonBlocking(ECSPI_Type *base,
701 ecspi_slave_handle_t *handle,
702 ecspi_transfer_t *xfer)
703 {
704 return ECSPI_MasterTransferNonBlocking(base, handle, xfer);
705 }
706
707 /*!
708 * @brief Gets the bytes of the ECSPI interrupt transferred.
709 *
710 * @param base ECSPI peripheral base address.
711 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
712 * @param count Transferred bytes of ECSPI slave.
713 * @retval kStatus_ECSPI_Success Succeed get the transfer count.
714 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
715 */
ECSPI_SlaveTransferGetCount(ECSPI_Type * base,ecspi_slave_handle_t * handle,size_t * count)716 static inline status_t ECSPI_SlaveTransferGetCount(ECSPI_Type *base, ecspi_slave_handle_t *handle, size_t *count)
717 {
718 return ECSPI_MasterTransferGetCount(base, handle, count);
719 }
720
721 /*!
722 * @brief Aborts an ECSPI slave transfer using interrupt.
723 *
724 * @param base ECSPI peripheral base address.
725 * @param handle Pointer to ECSPI transfer handle, this should be a static variable.
726 */
ECSPI_SlaveTransferAbort(ECSPI_Type * base,ecspi_slave_handle_t * handle)727 static inline void ECSPI_SlaveTransferAbort(ECSPI_Type *base, ecspi_slave_handle_t *handle)
728 {
729 ECSPI_MasterTransferAbort(base, handle);
730 }
731
732 /*!
733 * @brief Interrupts a handler for the ECSPI slave.
734 *
735 * @param base ECSPI peripheral base address.
736 * @param handle pointer to ecspi_slave_handle_t structure which stores the transfer state
737 */
738 void ECSPI_SlaveTransferHandleIRQ(ECSPI_Type *base, ecspi_slave_handle_t *handle);
739
740 /*! @} */
741
742 #if defined(__cplusplus)
743 }
744 #endif
745
746 /*! @} */
747
748 #endif /* _FSL_ECSPI_H_*/
749
