Home
last modified time | relevance | path

Searched refs:XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31303 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
31305 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h34232 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
34234 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46456 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
46458 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46438 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
46440 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42492 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
42494 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52390 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
52392 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44900 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
44902 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h55049 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
55051 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54975 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK (0x10000U) macro
54977 …t)(x)) << XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40188 #define XTALOSC24M_OSC_CONFIG2_SET_ENABLE_1M_MASK 0x10000u macro