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Searched refs:XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31287 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
31289 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h34216 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
34218 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46436 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
46438 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46418 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
46420 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42476 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
42478 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52370 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
52372 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44884 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
44886 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h55029 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
55031 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54955 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK (0x10000U) macro
54957 …(uint32_t)(x)) << XTALOSC24M_OSC_CONFIG2_ENABLE_1M_SHIFT)) & XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40178 #define XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK 0x10000u macro