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Searched refs:XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31284 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
31286 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h34213 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
34215 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46432 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
46434 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46414 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
46416 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42473 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
42475 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52366 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
52368 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44881 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
44883 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h55025 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
55027 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54951 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK (0xFFFU) macro
54953 …2_t)(x)) << XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT)) & XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40175 #define XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK 0xFFFu macro
40177 …int32_t)(x))<<XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_SHIFT))&XTALOSC24M_OSC_CONFIG2_COUNT_1M_TRG_MASK)