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Searched refs:XTALOSC24M_MISC0_REFTOP_PWD_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h30468 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
30470 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h33397 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
33399 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h45464 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
45466 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h45446 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
45448 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h41657 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
41659 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h51398 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
51400 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44065 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
44067 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54057 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
54059 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h53983 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK (0x1U) macro
53985 …int32_t)(((uint32_t)(x)) << XTALOSC24M_MISC0_REFTOP_PWD_SHIFT)) & XTALOSC24M_MISC0_REFTOP_PWD_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39898 #define XTALOSC24M_MISC0_REFTOP_PWD_MASK 0x1u macro