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Searched refs:XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31091 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
31093 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h34020 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
34022 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46190 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
46192 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46172 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
46174 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42280 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
42282 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52124 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
52126 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44688 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
44690 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54783 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
54785 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54709 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK (0x100U) macro
54711 …(x)) << XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40043 #define XTALOSC24M_LOWPWR_CTRL_TOG_L1_PWRGATE_MASK 0x100u macro