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Searched refs:XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
Dfsl_clock.c295 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1011.h30935 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
30941 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
Dfsl_clock.c229 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1015.h33864 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
33870 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_clock.c199 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1051.h42124 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
42130 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
Dfsl_clock.c228 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1021.h46002 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
46008 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_clock.c199 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1061.h44532 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
44538 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
Dfsl_clock.c228 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1024.h45984 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
45990 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_clock.c229 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1052.h51936 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
51942 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_clock.c230 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1062.h54595 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
54601 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_clock.c230 XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1064.h54521 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK (0x10U) macro
54527 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39969 #define XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK 0x10u macro