Home
last modified time | relevance | path

Searched refs:XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h30881 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
30883 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h33810 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
33812 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h45936 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
45938 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h45918 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
45920 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42070 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
42072 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h51870 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
51872 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44478 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
44480 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54529 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
54531 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54455 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK (0x40U) macro
54457 …(uint32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39940 #define XTALOSC24M_LOWPWR_CTRL_LPBG_TEST_MASK 0x40u macro