Searched refs:XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (Results 1 – 10 of 10) sorted by relevance
30921 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro30923 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
33850 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro33852 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
45986 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro45988 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
45968 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro45970 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
42110 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro42112 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
51920 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro51922 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
44518 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro44520 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
54579 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro54581 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
54505 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK (0x40000U) macro54507 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK)
39961 #define XTALOSC24M_LOWPWR_CTRL_GPU_PWRGATE_MASK 0x40000u macro
