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Searched refs:XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
Dfsl_clock.c299 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1011.h31003 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
31009 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
Dfsl_clock.c233 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1015.h33932 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
33938 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
Dfsl_clock.c203 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1051.h42192 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
42198 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
Dfsl_clock.c232 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1021.h46084 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
46090 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
Dfsl_clock.c203 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1061.h44600 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
44606 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
Dfsl_clock.c232 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1024.h46066 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
46072 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
Dfsl_clock.c233 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1052.h52018 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
52024 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
Dfsl_clock.c234 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1062.h54677 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
54683 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
Dfsl_clock.c234 XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; in CLOCK_SwitchOsc()
DMIMXRT1064.h54603 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK (0x10U) macro
54609 …t32_t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40002 #define XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK 0x10u macro