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Searched refs:XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h31017 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
31019 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h33946 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
33948 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h46100 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
46102 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h46082 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
46084 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h42206 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
42208 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h52034 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
52036 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h44614 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
44616 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h54693 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
54695 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h54619 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK (0x40U) macro
54621 …t)(x)) << XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40006 #define XTALOSC24M_LOWPWR_CTRL_CLR_LPBG_TEST_MASK 0x40u macro