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Searched refs:USBPHY_PWD_RSVD2_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h27837 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
27839 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h30635 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
30637 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h40299 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
40301 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h40281 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
40283 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h37205 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
37207 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h46185 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
46187 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h39613 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
39615 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h48844 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
48846 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h48770 #define USBPHY_PWD_RSVD2_MASK (0xFFE00000U) macro
48772 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_RSVD2_SHIFT)) & USBPHY_PWD_RSVD2_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h37930 #define USBPHY_PWD_RSVD2_MASK 0xFFE00000u macro
37932 … (((uint32_t)(((uint32_t)(x))<<USBPHY_PWD_RSVD2_SHIFT))&USBPHY_PWD_RSVD2_MASK)