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Searched refs:USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h28796 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
28798 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h28687 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
28689 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h31485 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
31487 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h41407 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
41409 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h41389 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
41391 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h38055 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
38057 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h47293 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
47295 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h40463 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
40465 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h49952 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
49954 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h49878 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
49880 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h38551 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK 0x1F0000u macro
38553 …(uint32_t)(x))<<USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT))&USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h96374 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
96378 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)
DMIMXRT1176_cm4.h97305 #define USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK (0x1F0000U) macro
97309 …t32_t)(x)) << USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_SHIFT)) & USBPHY_DEBUG_CLR_SQUELCHRESETCOUNT_MASK)