Home
last modified time | relevance | path

Searched refs:USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h28799 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
28801 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h28693 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
28695 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h31491 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
31493 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h41415 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
41417 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h41397 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
41399 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h38061 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
38063 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h47301 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
47303 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h40469 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
40471 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h49960 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
49962 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h49886 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
49888 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h96380 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
96384 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
DMIMXRT1176_cm4.h97311 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK (0x1000000U) macro
97315 …(((uint32_t)(x)) << USBPHY_DEBUG_CLR_ENSQUELCHRESET_SHIFT)) & USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK)
/hal_nxp-2.7.6/imx/devices/MCIMX6X/
DMCIMX6X_M4.h38557 #define USBPHY_DEBUG_CLR_ENSQUELCHRESET_MASK 0x1000000u macro