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Searched refs:TPM_CnSC_DMA_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h4224 #define TPM_CnSC_DMA_MASK (0x1U) macro
4226 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h7065 #define TPM_CnSC_DMA_MASK (0x1U) macro
7067 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h7914 #define TPM_CnSC_DMA_MASK 0x1u macro
7917 …A(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_DMA_SHIFT))&TPM_CnSC_DMA_MASK)
DMKW40Z4_extension.h23406 #define TPM_RD_CnSC_DMA(base, index) ((TPM_CnSC_REG(base, index) & TPM_CnSC_DMA_MASK) >> TPM_CnSC_D…
23410 #define TPM_WR_CnSC_DMA(base, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_DMA_MASK | TPM_CnS…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6994 #define TPM_CnSC_DMA_MASK (0x1U) macro
6996 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h7065 #define TPM_CnSC_DMA_MASK (0x1U) macro
7067 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h7914 #define TPM_CnSC_DMA_MASK 0x1u macro
7917 …A(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_DMA_SHIFT))&TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h7914 #define TPM_CnSC_DMA_MASK 0x1u macro
7917 …A(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_DMA_SHIFT))&TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h23854 #define TPM_CnSC_DMA_MASK (0x1U) macro
23860 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h24834 #define TPM_CnSC_DMA_MASK (0x1U) macro
24840 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h24016 #define TPM_CnSC_DMA_MASK (0x1U) macro
24022 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_DMA_SHIFT)) & TPM_CnSC_DMA_MASK)