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Searched refs:TPM_CnSC_CHF_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/kinetis/
Dfsl_tpm.h507 if (base->CONTROLS[chanlNumber].CnSC & TPM_CnSC_CHF_MASK) in TPM_GetStatusFlags()
542 base->CONTROLS[chnlNumber].CnSC &= ~TPM_CnSC_CHF_MASK; in TPM_ClearStatusFlags()
Dfsl_tpm.c508 & ~(TPM_CnSC_CHF_MASK) in TPM_UpdateChnlEdgeLevelSelect()
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h4242 #define TPM_CnSC_CHF_MASK (0x80U) macro
4244 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4_extension.h23410 …base, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_DMA_MASK | TPM_CnSC_CHF_MASK), TPM_CnSC_D…
23427 …ase, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_ELSA_MASK | TPM_CnSC_CHF_MASK), TPM_CnSC_E…
23444 …ase, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_ELSB_MASK | TPM_CnSC_CHF_MASK), TPM_CnSC_E…
23461 …base, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_MSA_MASK | TPM_CnSC_CHF_MASK), TPM_CnSC_M…
23478 …base, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_MSB_MASK | TPM_CnSC_CHF_MASK), TPM_CnSC_M…
23497 …ase, index, value) (TPM_RMW_CnSC(base, index, (TPM_CnSC_CHIE_MASK | TPM_CnSC_CHF_MASK), TPM_CnSC_C…
23517 #define TPM_RD_CnSC_CHF(base, index) ((TPM_CnSC_REG(base, index) & TPM_CnSC_CHF_MASK) >> TPM_CnSC_C…
23521 #define TPM_WR_CnSC_CHF(base, index, value) (TPM_RMW_CnSC(base, index, TPM_CnSC_CHF_MASK, TPM_CnSC_…
DMKW40Z4.h7938 #define TPM_CnSC_CHF_MASK 0x80u macro
7941 …F(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_CHF_SHIFT))&TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h7083 #define TPM_CnSC_CHF_MASK (0x80U) macro
7085 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h7012 #define TPM_CnSC_CHF_MASK (0x80U) macro
7014 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h7083 #define TPM_CnSC_CHF_MASK (0x80U) macro
7085 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h7938 #define TPM_CnSC_CHF_MASK 0x80u macro
7941 …F(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_CHF_SHIFT))&TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h7938 #define TPM_CnSC_CHF_MASK 0x80u macro
7941 …F(x) (((uint32_t)(((uint32_t)(x))<<TPM_CnSC_CHF_SHIFT))&TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h23880 #define TPM_CnSC_CHF_MASK (0x80U) macro
23886 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h24860 #define TPM_CnSC_CHF_MASK (0x80U) macro
24866 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h24042 #define TPM_CnSC_CHF_MASK (0x80U) macro
24048 … (((uint32_t)(((uint32_t)(x)) << TPM_CnSC_CHF_SHIFT)) & TPM_CnSC_CHF_MASK)