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Searched refs:SYSCON_WDTCLKDIV_DIV_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/LPC55S28/
Dfsl_clock.c690 return CLOCK_GetFro1MFreq() / ((SYSCON->WDTCLKDIV & SYSCON_WDTCLKDIV_DIV_MASK) + 1U); in CLOCK_GetWdtClkFreq()
DLPC55S28.h22429 #define SYSCON_WDTCLKDIV_DIV_MASK (0x3FU) macro
22433 … (((uint32_t)(((uint32_t)(x)) << SYSCON_WDTCLKDIV_DIV_SHIFT)) & SYSCON_WDTCLKDIV_DIV_MASK)
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
Dfsl_clock.c690 return CLOCK_GetFro1MFreq() / ((SYSCON->WDTCLKDIV & SYSCON_WDTCLKDIV_DIV_MASK) + 1U); in CLOCK_GetWdtClkFreq()
DLPC55S69_cm33_core0.h23049 #define SYSCON_WDTCLKDIV_DIV_MASK (0x3FU) macro
23053 … (((uint32_t)(((uint32_t)(x)) << SYSCON_WDTCLKDIV_DIV_SHIFT)) & SYSCON_WDTCLKDIV_DIV_MASK)
DLPC55S69_cm33_core1.h23049 #define SYSCON_WDTCLKDIV_DIV_MASK (0x3FU) macro
23053 … (((uint32_t)(((uint32_t)(x)) << SYSCON_WDTCLKDIV_DIV_SHIFT)) & SYSCON_WDTCLKDIV_DIV_MASK)
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
Dfsl_clock.c659 return CLOCK_GetFro1MFreq() / ((SYSCON->WDTCLKDIV & SYSCON_WDTCLKDIV_DIV_MASK) + 1U); in CLOCK_GetWdtClkFreq()
DLPC55S16.h22415 #define SYSCON_WDTCLKDIV_DIV_MASK (0x3FU) macro
22419 … (((uint32_t)(((uint32_t)(x)) << SYSCON_WDTCLKDIV_DIV_SHIFT)) & SYSCON_WDTCLKDIV_DIV_MASK)