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Searched refs:SYSCON_AHBCLKCTRL0_GPIO0_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/LPC55S28/
DLPC55S28.h21118 #define SYSCON_AHBCLKCTRL0_GPIO0_MASK (0x4000U) macro
21124 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_GPIO0_SHIFT)) & SYSCON_AHBCLKCTRL0_GPIO0_MASK)
/hal_nxp-2.7.6/mcux/devices/LPC55S69/
DLPC55S69_cm33_core0.h21720 #define SYSCON_AHBCLKCTRL0_GPIO0_MASK (0x4000U) macro
21726 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_GPIO0_SHIFT)) & SYSCON_AHBCLKCTRL0_GPIO0_MASK)
DLPC55S69_cm33_core1.h21720 #define SYSCON_AHBCLKCTRL0_GPIO0_MASK (0x4000U) macro
21726 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_GPIO0_SHIFT)) & SYSCON_AHBCLKCTRL0_GPIO0_MASK)
/hal_nxp-2.7.6/mcux/devices/LPC55S16/
DLPC55S16.h21223 #define SYSCON_AHBCLKCTRL0_GPIO0_MASK (0x4000U) macro
21229 … (((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_GPIO0_SHIFT)) & SYSCON_AHBCLKCTRL0_GPIO0_MASK)