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Searched refs:SNVS_HPSVSR_SV2_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_snvs_hp.h53 #ifndef SNVS_HPSVSR_SV2_MASK
54 #define SNVS_HPSVSR_SV2_MASK SNVS_HPSVSR_WDOG2_MASK macro
76 kSNVS_Violation2Flag = SNVS_HPSVSR_SV2_MASK, /*!< Security Violation 2 */
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h23834 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
23840 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h26154 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
26160 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h35232 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
35238 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h35214 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
35220 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h32267 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
32273 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h40607 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
40613 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h34672 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
34678 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h43263 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
43269 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h43189 #define SNVS_HPSVSR_SV2_MASK (0x4U) macro
43195 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV2_SHIFT)) & SNVS_HPSVSR_SV2_MASK)