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Searched refs:SNVS_HPSVSR_SV0_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_snvs_hp.h45 #ifndef SNVS_HPSVSR_SV0_MASK
46 #define SNVS_HPSVSR_SV0_MASK SNVS_HPSVSR_CAAM_MASK macro
74 kSNVS_Violation0Flag = SNVS_HPSVSR_SV0_MASK, /*!< Security Violation 0 */
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h23820 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
23826 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h26140 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
26146 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h35216 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
35222 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h35198 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
35204 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h32253 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
32259 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h40591 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
40597 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h34658 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
34664 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h43247 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
43253 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h43173 #define SNVS_HPSVSR_SV0_MASK (0x1U) macro
43179 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_SV0_SHIFT)) & SNVS_HPSVSR_SV0_MASK)