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Searched refs:SNVS_HPSR_PI_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-2.7.6/mcux/drivers/imx/
Dfsl_snvs_hp.c27 #if !(defined(SNVS_HPSR_PI_MASK))
28 #define SNVS_HPSR_PI_MASK (0x2U) macro
513 if ((base->HPSR & SNVS_HPSR_PI_MASK) != 0U) in SNVS_HP_RTC_GetStatusFlags()
Dfsl_snvs_hp.h39 …kSNVS_RTC_PeriodicInterruptFlag = SNVS_HPSR_PI_MASK, /*!< RTC periodic interrupt flag */
/hal_nxp-2.7.6/mcux/devices/MIMXRT1011/
DMIMXRT1011.h23761 #define SNVS_HPSR_PI_MASK (0x2U) macro
23767 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1015/
DMIMXRT1015.h26081 #define SNVS_HPSR_PI_MASK (0x2U) macro
26087 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1021/
DMIMXRT1021.h35144 #define SNVS_HPSR_PI_MASK (0x2U) macro
35150 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1024/
DMIMXRT1024.h35126 #define SNVS_HPSR_PI_MASK (0x2U) macro
35132 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1051/
DMIMXRT1051.h32194 #define SNVS_HPSR_PI_MASK (0x2U) macro
32200 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1052/
DMIMXRT1052.h40523 #define SNVS_HPSR_PI_MASK (0x2U) macro
40529 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1061/
DMIMXRT1061.h34599 #define SNVS_HPSR_PI_MASK (0x2U) macro
34605 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1062/
DMIMXRT1062.h43179 #define SNVS_HPSR_PI_MASK (0x2U) macro
43185 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1064/
DMIMXRT1064.h43105 #define SNVS_HPSR_PI_MASK (0x2U) macro
43111 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
/hal_nxp-2.7.6/mcux/devices/MIMXRT1176/
DMIMXRT1176_cm7.h85392 #define SNVS_HPSR_PI_MASK (0x2U) macro
85398 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)
DMIMXRT1176_cm4.h86323 #define SNVS_HPSR_PI_MASK (0x2U) macro
86329 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSR_PI_SHIFT)) & SNVS_HPSR_PI_MASK)