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Searched refs:SIM_SDID_SUBFAMID_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3768 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
3770 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h12030 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
12041 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h14399 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
14401 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h15204 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
15206 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h15210 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
15212 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6381 #define SIM_SDID_SUBFAMID_MASK (0x3000000U) macro
6383 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h21546 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
21557 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h6941 #define SIM_SDID_SUBFAMID_MASK 0x3000000u macro
6944 … (((uint32_t)(((uint32_t)(x))<<SIM_SDID_SUBFAMID_SHIFT))&SIM_SDID_SUBFAMID_MASK)
DMKW40Z4_extension.h19838 #define SIM_RD_SDID_SUBFAMID(base) ((SIM_SDID_REG(base) & SIM_SDID_SUBFAMID_MASK) >> SIM_SDID_SUBFA…
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6310 #define SIM_SDID_SUBFAMID_MASK (0x3000000U) macro
6312 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h6381 #define SIM_SDID_SUBFAMID_MASK (0x3000000U) macro
6383 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h6941 #define SIM_SDID_SUBFAMID_MASK 0x3000000u macro
6944 … (((uint32_t)(((uint32_t)(x))<<SIM_SDID_SUBFAMID_SHIFT))&SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h6941 #define SIM_SDID_SUBFAMID_MASK 0x3000000u macro
6944 … (((uint32_t)(((uint32_t)(x))<<SIM_SDID_SUBFAMID_SHIFT))&SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h19560 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
19567 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h22001 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
22012 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h20900 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
20907 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h22974 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
22985 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h22094 #define SIM_SDID_SUBFAMID_MASK (0xF000000U) macro
22105 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_SUBFAMID_SHIFT)) & SIM_SDID_SUBFAMID_MASK)