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Searched refs:SIM_SDID_REVID_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
DMKL25Z4.h3759 #define SIM_SDID_REVID_MASK (0xF000U) macro
3761 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK22F51212/
DMK22F51212.h12018 #define SIM_SDID_REVID_MASK (0xF000U) macro
12020 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW24D5/
DMKW24D5.h6553 #define SIM_SDID_REVID_MASK (0xF000U) macro
6555 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE14F16/
DMKE14F16.h14383 #define SIM_SDID_REVID_MASK (0xF000U) macro
14385 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW22D5/
DMKW22D5.h6553 #define SIM_SDID_REVID_MASK (0xF000U) macro
6555 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE16F16/
DMKE16F16.h15188 #define SIM_SDID_REVID_MASK (0xF000U) macro
15190 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKE18F16/
DMKE18F16.h15194 #define SIM_SDID_REVID_MASK (0xF000U) macro
15196 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6372 #define SIM_SDID_REVID_MASK (0xF000U) macro
6374 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK64F12/
DMK64F12.h21530 #define SIM_SDID_REVID_MASK (0xF000U) macro
21534 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
DMKW40Z4.h6929 #define SIM_SDID_REVID_MASK 0xF000u macro
6932 …x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_REVID_SHIFT))&SIM_SDID_REVID_MASK)
DMKW40Z4_extension.h19796 #define SIM_RD_SDID_REVID(base) ((SIM_SDID_REG(base) & SIM_SDID_REVID_MASK) >> SIM_SDID_REVID_SHIFT)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6301 #define SIM_SDID_REVID_MASK (0xF000U) macro
6303 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
DMKW41Z4.h6372 #define SIM_SDID_REVID_MASK (0xF000U) macro
6374 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
DMKW20Z4.h6929 #define SIM_SDID_REVID_MASK 0xF000u macro
6932 …x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_REVID_SHIFT))&SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
DMKW30Z4.h6929 #define SIM_SDID_REVID_MASK 0xF000u macro
6932 …x) (((uint32_t)(((uint32_t)(x))<<SIM_SDID_REVID_SHIFT))&SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV56F24/
DMKV56F24.h19551 #define SIM_SDID_REVID_MASK (0xF000U) macro
19553 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
DMK80F25615.h21989 #define SIM_SDID_REVID_MASK (0xF000U) macro
21991 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MKV58F24/
DMKV58F24.h20891 #define SIM_SDID_REVID_MASK (0xF000U) macro
20893 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
DMK82F25615.h22962 #define SIM_SDID_REVID_MASK (0xF000U) macro
22964 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
DMK66F18.h22082 #define SIM_SDID_REVID_MASK (0xF000U) macro
22084 … (((uint32_t)(((uint32_t)(x)) << SIM_SDID_REVID_SHIFT)) & SIM_SDID_REVID_MASK)