Searched refs:SIM_SCGC7_DMA_MASK (Results 1 – 17 of 17) sorted by relevance
3857 #define SIM_SCGC7_DMA_MASK (0x100U) macro3859 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
12310 #define SIM_SCGC7_DMA_MASK (0x2U) macro12316 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
6660 #define SIM_SCGC7_DMA_MASK (0x2U) macro6662 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
6488 #define SIM_SCGC7_DMA_MASK (0x100U) macro6490 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
21973 #define SIM_SCGC7_DMA_MASK (0x2U) macro21979 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
7065 #define SIM_SCGC7_DMA_MASK 0x100u macro7068 …(x) (((uint32_t)(((uint32_t)(x))<<SIM_SCGC7_DMA_SHIFT))&SIM_SCGC7_DMA_MASK)
20505 #define SIM_RD_SCGC7_DMA(base) ((SIM_SCGC7_REG(base) & SIM_SCGC7_DMA_MASK) >> SIM_SCGC7_DMA_SHIFT)20509 #define SIM_WR_SCGC7_DMA(base, value) (SIM_RMW_SCGC7(base, SIM_SCGC7_DMA_MASK, SIM_SCGC7_DMA(value)…
6417 #define SIM_SCGC7_DMA_MASK (0x100U) macro6419 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
19962 #define SIM_SCGC7_DMA_MASK (0x100U) macro19968 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
22404 #define SIM_SCGC7_DMA_MASK (0x2U) macro22410 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
21302 #define SIM_SCGC7_DMA_MASK (0x100U) macro21308 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
23384 #define SIM_SCGC7_DMA_MASK (0x2U) macro23390 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
22528 #define SIM_SCGC7_DMA_MASK (0x2U) macro22534 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
